SAM3U4E Atmel Corporation, SAM3U4E Datasheet - Page 119
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SAM3U4E
Manufacturer Part Number
SAM3U4E
Description
Manufacturer
Atmel Corporation
Specifications of SAM3U4E
Flash (kbytes)
256 Kbytes
Pin Count
144
Max. Operating Frequency
96 MHz
Cpu
Cortex-M3
# Of Touch Channels
57
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
5
Twi (i2c)
2
Uart
5
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
50
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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13.12.1
13.12.1.1
13.12.1.2
13.12.1.3
6430E–ATARM–29-Aug-11
ADD, ADC, SUB, SBC, and RSB
Syntax
Operation
Restrictions
Add, Add with carry, Subtract, Subtract with carry, and Reverse Subtract.
where:
op
S
result of the operation, see
cond
Rd
Rn
Operand2
imm12
The ADD instruction adds the value of Operand2 or imm12 to the value in Rn.
The ADC instruction adds the values in Rn and Operand2, together with the carry flag.
The SUB instruction subtracts the value of Operand2 or imm12 from the value in Rn.
The SBC instruction subtracts the value of Operand2 from the value in Rn. If the carry flag is
clear, the result is reduced by one.
The RSB instruction subtracts the value in Rn from the value of Operand2. This is useful
because of the wide range of options for Operand2.
Use ADC and SBC to synthesize multiword arithmetic, see
page
See also
ADDW is equivalent to the ADD syntax that uses the imm12 operand. SUBW is equivalent to the
SUB syntax that uses the imm12 operand.
In these instructions:
• Operand2 must not be SP and must not be PC
op{S}{cond} {Rd,} Rn, Operand2
op{cond} {Rd,} Rn, #imm12
121.
ADD
ADC
SUB
SBC
RSB
“ADR” on page
is one of:
Add.
Add with Carry.
Subtract.
Subtract with Carry.
Reverse Subtract.
is an optional suffix. If S is specified, the condition code flags are updated on the
is an optional condition code, see
is the destination register. If Rd is omitted, the destination register is Rn.
is the register holding the first operand.
is a flexible second operand.
See
is any value in the range 0-4095.
“Flexible second operand” on page 94
102.
“Conditional execution” on page
“Conditional execution” on page
; ADD and SUB only
for details of the options.
98.
“Multiword arithmetic examples” on
SAM3U Series
98.
119
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