SAM3U4E Atmel Corporation, SAM3U4E Datasheet - Page 128
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SAM3U4E
Manufacturer Part Number
SAM3U4E
Description
Manufacturer
Atmel Corporation
Specifications of SAM3U4E
Flash (kbytes)
256 Kbytes
Pin Count
144
Max. Operating Frequency
96 MHz
Cpu
Cortex-M3
# Of Touch Channels
57
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
5
Twi (i2c)
2
Uart
5
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
50
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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13.12.6
13.12.6.1
13.12.6.2
13.12.6.3
128
SAM3U Series
MOV and MVN
Syntax
Operation
Restrictions
Move and Move NOT.
where:
S
result of the operation, see
cond
Rd
Operand2
details of the options.
imm16
The MOV instruction copies the value of Operand2 into Rd.
When Operand2 in a MOV instruction is a register with a shift other than LSL #0, the preferred
syntax is the corresponding shift instruction:
Also, the MOV instruction permits additional forms of Operand2 as synonyms for shift
instructions:
See
The MVN instruction takes the value of Operand2, performs a bitwise logical NOT operation on
the value, and places the result into Rd.
The MOVW instruction provides the same function as MOV, but is restricted to using the imm16
operand.
You can use SP and PC only in the MOV instruction, with the following restrictions:
When Rd is PC in a MOV instruction:
• ASR{S}{cond} Rd, Rm, #n is the preferred syntax for MOV{S}{cond} Rd, Rm, ASR #n
• LSL{S}{cond} Rd, Rm, #n is the preferred syntax for MOV{S}{cond} Rd, Rm, LSL #n if n != 0
• LSR{S}{cond} Rd, Rm, #n is the preferred syntax for MOV{S}{cond} Rd, Rm, LSR #n
• ROR{S}{cond} Rd, Rm, #n is the preferred syntax for MOV{S}{cond} Rd, Rm, ROR #n
• RRX{S}{cond} Rd, Rm is the preferred syntax for MOV{S}{cond} Rd, Rm, RRX.
• MOV{S}{cond} Rd, Rm, ASR Rs is a synonym for ASR{S}{cond} Rd, Rm, Rs
• MOV{S}{cond} Rd, Rm, LSL Rs is a synonym for LSL{S}{cond} Rd, Rm, Rs
• MOV{S}{cond} Rd, Rm, LSR Rs is a synonym for LSR{S}{cond} Rd, Rm, Rs
• MOV{S}{cond} Rd, Rm, ROR Rs is a synonym for ROR{S}{cond} Rd, Rm, Rs
• the second operand must be a register without shift
• you must not specify the S suffix.
MOV{S}{cond} Rd, Operand2
MOV{cond} Rd, #imm16
MVN{S}{cond} Rd, Operand2
“ASR, LSL, LSR, ROR, and RRX” on page
is an optional suffix. If S is specified, the condition code flags are updated on the
is an optional condition code, see
is the destination register.
is a flexible second operand. See
is any value in the range 0-65535.
“Conditional execution” on page
124.
“Conditional execution” on page
“Flexible second operand” on page 94
98.
6430E–ATARM–29-Aug-11
98.
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