SAM3U4E Atmel Corporation, SAM3U4E Datasheet - Page 330
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SAM3U4E
Manufacturer Part Number
SAM3U4E
Description
Manufacturer
Atmel Corporation
Specifications of SAM3U4E
Flash (kbytes)
256 Kbytes
Pin Count
144
Max. Operating Frequency
96 MHz
Cpu
Cortex-M3
# Of Touch Channels
57
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
5
Twi (i2c)
2
Uart
5
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
50
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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22.2.5.5
22.2.5.6
330
SAM3U Series
Flash General-purpose NVM Commands
Flash Security Bit Command
Lock bits can be read using Get Lock Bit command (GLB). The n
n of the bit mask is set..
Table 22-10. Get Lock Bit Command
General-purpose NVM bits (GP NVM bits) can be set using the Set GPNVM command (SGPB).
This command also activates GP NVM bits. A bit mask is provided as argument to the com-
mand. When bit 0 of the bit mask is set, then the first GP NVM bit is activated.
Likewise, the Clear GPNVM command (CGPB) is used to clear general-purpose NVM bits. All
the general-purpose NVM bits are also cleared by the EA command. The general-purpose NVM
bit is deactivated when the corresponding bit in the pattern value is set to 1.
Table 22-11. Set/Clear GP NVM Command
General-purpose NVM bits can be read using the Get GPNVM Bit command (GGPB). The n
GP NVM bit is active when bit n of the bit mask is set..
Table 22-12. Get GP NVM Bit Command
A security bit can be set using the Set Security Bit command (SSE). Once the security bit is
active, the Fast Flash programming is disabled. No other command can be run. An event on the
Erase pin can erase the security bit once the contents of the Flash have been erased.
The AT9SAM3U256 security bit is controlled by the EEFC0. To use the Set Security Bit com-
mand, the EEFC0 must be selected using the Select EFC command.
Step
1
2
Step
1
2
Step
1
2
Handshake Sequence
Write handshaking
Read handshaking
Handshake Sequence
Write handshaking
Write handshaking
Handshake Sequence
Write handshaking
Read handshaking
MODE[3:0]
CMDE
DATA
MODE[3:0]
CMDE
DATA
MODE[3:0]
CMDE
DATA
DATA[15:0]
GLB
Lock Bit Mask Status
0 = Lock bit is cleared
1 = Lock bit is set
DATA[15:0]
SGPB or CGPB
GP NVM bit pattern value
DATA[15:0]
GGPB
GP NVM Bit Mask Status
0 = GP NVM bit is cleared
1 = GP NVM bit is set
th
lock bit is active when the bit
6430E–ATARM–29-Aug-11
th
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