SAM3U4E Atmel Corporation, SAM3U4E Datasheet - Page 177
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SAM3U4E
Manufacturer Part Number
SAM3U4E
Description
Manufacturer
Atmel Corporation
Specifications of SAM3U4E
Flash (kbytes)
256 Kbytes
Pin Count
144
Max. Operating Frequency
96 MHz
Cpu
Cortex-M3
# Of Touch Channels
57
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
5
Twi (i2c)
2
Uart
5
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
50
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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13.19.10 NVIC design hints and tips
13.19.10.1
6430E–ATARM–29-Aug-11
NVIC programming hints
Ensure software uses correctly aligned register accesses. The processor does not support
unaligned accesses to NVIC registers. See the individual register descriptions for the supported
access sizes.
A interrupt can enter pending state even it is disabled.
Before programming VTOR to relocate the vector table, ensure the vector table entries of the
new vector table are setup for fault handlers and all enabled exception like interrupts. For more
information see
Software uses the CPSIE I and CPSID I instructions to enable and disable interrupts. The
CMSIS provides the following intrinsic functions for these instructions:
In addition, the CMSIS provides a number of functions for NVIC control, including:
Table 13-29. CMSIS functions for NVIC control
For more information about these functions see the CMSIS documentation.
CMSIS interrupt control function
void NVIC_SetPriorityGrouping(uint32_t
priority_grouping)
void NVIC_EnableIRQ(IRQn_t IRQn)
void NVIC_DisableIRQ(IRQn_t IRQn)
uint32_t NVIC_GetPendingIRQ (IRQn_t IRQn)
void NVIC_SetPendingIRQ (IRQn_t IRQn)
void NVIC_ClearPendingIRQ (IRQn_t IRQn)
uint32_t NVIC_GetActive (IRQn_t IRQn)
void NVIC_SetPriority (IRQn_t IRQn, uint32_t priority)
uint32_t NVIC_GetPriority (IRQn_t IRQn)
void NVIC_SystemReset (void)
void __disable_irq(void) // Disable Interrupts
void __enable_irq(void) // Enable Interrupts
“Vector Table Offset Register” on page
Return true if IRQn is pending
Set priority for IRQn
Read priority of IRQn
Description
Set the priority grouping
Enable IRQn
Disable IRQn
Set IRQn pending
Clear IRQn pending status
Return the IRQ number of the active
interrupt
Reset the system
184.
SAM3U Series
177
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