ATxmega256A3BU Atmel Corporation, ATxmega256A3BU Datasheet - Page 440

• Manufacturer Part Number: ATxmega256A3BU
• Manufacturer: Atmel Corporation

Specifications of ATxmega256A3BU

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 47
• Ext Interrupts: 49
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 8
• Twi (i2c): 2
• Uart: 6
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

33.11.5
8331A–AVR–07/11
NVM EEPROM Commands
Figure 33-2. I/O mapped EEPROM addressing
When EEPROM memory mapping is enabled, loading a data byte into the EEPROM page buffer
can be performed through direct or indirect store instructions. Only the least significant bits of
the EEPROM address are used to determine locations within the page buffer, but the complete
memory mapped EEPROM address is always required to ensure correct address mapping.
Reading from the EEPROM can be done directly using direct or indirect load instructions. When
a memory mapped EEPROM page buffer load operation is performed, the CPU is halted for 2
cycles before the next instruction is executed.
When the EEPROM is memory mapped, the EEPROM page buffer load and EEPROM read
functionality from the NVM controller is disabled.
The NVM Flash commands that can be used for accessing the EEPROM through the NVM Con-
troller are listed in
For self-programming of the EEPROM, the Trigger for Action Triggered Commands is to set the
CMDEX bit in the NVM CTRLA register (CMDEX). The Read Triggered Command is triggered
by reading the NVM DATA0 register (DATA0).
The Change Protected column indicates if the trigger is protected by the Configuration Change
Protection (CCP) during self-programming or not. CCP is not required for external programming.
The last two columns show the address pointer used for addressing, and the source/destination
data register.
E2PAGE
E2END
00
01
02
NVM ADDR
EEPROM MEMORY
Table
BIT
PAGE
WITHIN THE EEPROM
33-4.
P
PAGE ADDRESS
A
G
E
M
S
B
E2PAGE
B
Y
T
Atmel AVR XMEGA AU
E
M
E2BYTE
S
B
BYTE ADDRESS
WITHIN A PAGE
0
DATA BYTE
PAGE
E2BYTE
00
01
02
E2PAGEEND
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