ATxmega256A3BU Atmel Corporation, ATxmega256A3BU Datasheet - Page 383

• Manufacturer Part Number: ATxmega256A3BU
• Manufacturer: Atmel Corporation

Specifications of ATxmega256A3BU

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 47
• Ext Interrupts: 49
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 8
• Twi (i2c): 2
• Uart: 6
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

29.3
29.4
29.5
29.6
8331A–AVR–07/11
Voltage reference selection
Starting a conversion
Output and output channels
DAC Output model
Figure 29-1. DAC overview
The following voltages can be used as reference (VREF) for the DAC
By default conversions will be started automatically when new data is written to the channel data
register. It is also possible to enable events from the Event System to trigger conversion starts.
When this is enabled, a new conversion is started when the DAC channel receives an event and
if the channel data register has been updated. This enable the conversion starts to be synchro-
nized with external events and/or timed to ensure regular and fixed conversion intervals.
The two DAC channels have fully independent outputs and individual data and conversion con-
trol registers. This enables the DAC to create two different analog signals. The channel 0 output
can also be made internally available as input for the Analog Comparator and the ADC.
The output voltage from a DAC channel (VDAC) is given as:
Each DAC output channel has a driver buffer with feedback to ensure that the voltage on the
DAC output pin is equal to the DACs internal voltage.
output model, for details on R
V
DACx
– AVCC voltage
– Accurate internal 1.00V voltage.
– External voltage applied to AREF pin on PORTA.
– External voltage applied to AREF pin on PORTB.
=
CHnDATA
--------------------------- -
0xFFF
(Data Empty)
(Data Empty)
DMA req
Internal 1.00V
DMA req
AREFA
AREFB
AVCC
×
VREF
CH0DATA
CH1DATA
Reference
selection
channel
12
12
, refer to the DAC characteristics in the device data sheet.
D
A
T
A
D
A
T
A
Trigger
Trigger
CTRLB
DAC0
DAC1
Select
Select
Atmel AVR XMEGA AU
CTRLA
Figure 29-2 on page 384
Enable
Enable
Internal Output
enable
Output
Driver
Int.
driver
Output
Driver
To
AC/ADC
shows the DAC
383