ATxmega256A3BU Atmel Corporation, ATxmega256A3BU Datasheet - Page 431

• Manufacturer Part Number: ATxmega256A3BU
• Manufacturer: Atmel Corporation

Specifications of ATxmega256A3BU

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 47
• Ext Interrupts: 49
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 8
• Twi (i2c): 2
• Uart: 6
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

33.8
33.9
33.9.1
33.9.2
33.10 CRC Functionality
8331A–AVR–07/11
Protection of NVM
Preventing NVM Corruption
Write Corruption
Read Corruption
Alternative 1:
Alternative 2:
To protect the Flash and EEPROM memories from write and/or read, Lock Bits can be set to
restrict access from external programmers and the application software. Refer to
Nonolatile Memory Lock Bit Register” on page 29
and how to use them.
During periods when the V
result from a Flash memory read or write can be corrupt as supply voltage is too low for the CPU
and the Flash to operate properly.
To ensure that the voltage is enough during a complete write sequence to the Flash memory,
the BOD is automatically enabled at its configured level during chip erase and when the PDI is
enabled. For other programming operations, the POR threshold (V
depending on the programming operation, any of these Vcc voltage levels are reached, the pro-
gramming sequence will be aborted immediately. If this happens, the NVM programming should
be restarted when the power is sufficient again in case the write sequence failed or only partly
succeeded.
The NVM can be read incorrectly if the supply voltage is too low so the CPU execute instructions
incorrectly. To ensure that this does not happen, the BOD can be enabled.
It is possible to run an automatic Cyclic Redundancy Check (CRC) on the Flash Program Mem-
ory. When NVM is used to control the CRC module, an even number of bytes is read, at least in
the flash range mode. If the user selects a range with an odd number of bytes, an extra byte will
be read, and the checksum will not correspond to the selected range.
Refer to
• Fill the EEPROM page buffer with the selected number of bytes.
• Perform a EEPROM Page Erase.
• Perform a EEPROM Page Write.
• Fill the EEPROM page buffer with the selected number of bytes.
• Perform an atomic EEPROM Page Erase and Write.
”CRC - Cyclic Redundancy Check” on page 324
CC
voltage is below the minimum operating voltage for the device, the
for details on the available Lock Bit settings
Atmel AVR XMEGA AU
for more details.
POT+
) level used. If, and
”LOCKBITS –
431