ATxmega256A3BU Atmel Corporation, ATxmega256A3BU Datasheet - Page 367

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ATxmega256A3BU

Manufacturer Part Number
ATxmega256A3BU
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega256A3BU

Flash (kbytes)
256 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
47
Ext Interrupts
49
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
8
Twi (i2c)
2
Uart
6
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
16
Eeprom (bytes)
4096
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
7
Output Compare Channels
22
Input Capture Channels
22
Pwm Channels
22
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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8331A–AVR–07/11
Table 28-2.
• Bit 6:5 – CURRLIMIT[1:0]: Current Limitation
These bits can be used to limit the maximum current consumption of the ADC. Setting these bits
will also reduce the maximum sampling rate. The available settings is shown in
page
actual current limitation for each setting.
Table 28-3.
• Bit 4 – CONVMODE: ADC Conversion Mode
This bit controls whether the ADC will work in signed or unsigned mode. By default this bit is
cleared and the ADC is configured for unsigned mode. When this bit is set the ADC is configured
for signed mode.
• Bit 3 – FREERUN: ADC Free Running Mode
When the bit is set to one, the ADC is in free running mode and ADC channels defined in the
EVCTRL register are swept repeatedly.
• Bit 2:1 – RESOLUTION[1:0]: ADC Conversion Result Resolution
These bits define whether the ADC completes the conversion at 12- or 8-bit result. They also
define whether the 12-bit result is left or right oriented in the 16-bit result registers. See
28-4 on page 367
Table 28-4.
• Bit 0 - Reserved
This bit is unused and reserved for future use. For compatibility with future devices, always write
this bit to zero when this register is written.
IMPMODE
RESOLUTION[1:0]
CURRLIMIT[1:0]
367. The indicated current limitations are nominal values, refer to device datasheet for
0
1
00
01
10
11
00
01
10
11
Gain Stage Impedence Mode
ADC Current Limitations
ADC Conversion Result resolution
HIGHIMP
LOWIMP
for possible settings.
Group Configuration
Group Configuration
NO
LOW
MED
HIGH
Group Configuration
12BIT
8BIT
LEFT12BIT
Description
For high-impedance sources. Charge will remain on input
For low impedance sources
12-bit result, right adjusted
Reserved
8-bit result, right adjusted
12-bit result, left adjusted
Description
No currentlimit
Low current limit, max sampling rate 1.5MSPS
Medium current limit, max sampling rate 1MSPS
High current limit, max sampling rate 0.5MSPS
Description
Atmel AVR XMEGA AU
Table 28-3 on
Table
367

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