ATxmega256A3BU Atmel Corporation, ATxmega256A3BU Datasheet - Page 329

• Manufacturer Part Number: ATxmega256A3BU
• Manufacturer: Atmel Corporation

Specifications of ATxmega256A3BU

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 47
• Ext Interrupts: 49
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 8
• Twi (i2c): 2
• Uart: 6
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

26.7.5
26.7.6
26.7.7
8331A–AVR–07/11
CHECKSUM1 – Checksum Byte 1
CHECKSUM2 – Checksum Byte 2
CHECKSUM3 – CRC Checksum Byte 3
possible to write RESET to reset all bits to one. It is possible to write these registers only when
the CRC module is disabled. If NVM is selected as the source, reading CHECKSUM will return a
zero value until the BUSY flag is cleared. If CRC-32 is selected and the BUSY flag is cleared
(i.e., CRC generation is completed or aborted), the bit reversed (bit 31 is swapped with bit 0, bit
30 with bit 1, etc.) and complemented result will be read from CHECKSUM. If CRC-16 is
selected or the BUSY flag is set (i.e., CRC generation is ongoing), CHECKSUM will contain the
actual content.
• Bit 7:0 – CHECKSUM[7:0]
These bits hold byte 0 of the generated CRC.
• Bit 7:0 – CHECKSUM[15:8]
These bits hold byte 1 of the generated CRC.
• Bit 7:0 – CHECKSUM[23:16]
These bits hold byte 2 of the generated CRC when CRC-32 is used.
• Bit 7:0 – CHECKSUM[31:24]
These bits hold byte 3 of the generated CRC when CRC-32 is used.
Bit
+0x05
Read/Write
Initial Value
Bit
+0x06
Read/Write
Initial Value
Bit
+0x04
Read/Write
Initial Value
Bit
+0x07
Read/Write
Initial Value
R/W
R/W
R/W
R/W
7
0
7
0
7
0
7
0
R/W
R/W
R/W
R/W
6
0
6
0
6
0
6
0
R/W
R/W
R/W
R/W
5
0
5
0
5
0
5
0
R/W
R/W
CHECKSUM[15:8]
CHECKSUM[23:16]
R/W
CHECKSUM[31:24]
CHECKSUM[7:0]
R/W
4
0
4
0
4
0
4
0
R/W
R/W
R/W
R/W
3
0
3
0
3
0
3
0
Atmel AVR XMEGA AU
R/W
R/W
R/W
2
0
R/W
2
0
2
0
2
0
R/W
R/W
R/W
1
0
1
0
R/W
1
0
1
0
R/W
R/W
0
0
R/W
0
0
R/W
0
0
0
0
CHECKSUM0
CHECKSUM1
CHECKSUM2
CHECKSUM3
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