ATmega406 Atmel Corporation, ATmega406 Datasheet - Page 117

• Manufacturer Part Number: ATmega406
• Manufacturer: Atmel Corporation

Specifications of ATmega406

• Flash (kbytes): 40 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 1 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 18
• Ext Interrupts: 4
• Usb Speed: No
• Usb Interface: No
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1.9
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -30 to 85
• I/o Supply Class: 4.0 to 25
• Operating Voltage (vcc): 4.0 to 25
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Pwm Channels: 2
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

20.2
2548E–AVR–07/06
Operation
Figure 20-1. Voltage ADC Block Schematic
To enable V-ADC conversions, the V-ADC Enable bit, VADEN, in V-ADC Control and Status
Register – VADCSR must be set. If this bit is cleared, the V-ADC will be switched off, and any
ongoing conversions will be terminated. The V-ADC is automatically halted in Power-save,
Power-down and Power-off mode. Note that the bandgap voltage reference must be enabled
and disabled separately, see “BGCCR – Bandgap Calibration C Register” on page 123.
Figure 20-2. Voltage ADC Conversion Diagram
To perform a V-ADC conversion, the analog input channel must first be selected by writing to the
VADMUX bits in VADMUX. When a logical one is written to the V-ADC Start Conversion bit
VADSC, a conversion of the selected channel will start. The VADSC bit stays high as long as the
conversion is in progress and will be cleared by hardware when the conversion is completed. If a
different data channel is selected while a conversion is in progress, the ADC will finish the cur-
rent conversion before performing the channel change. When a conversion is finished the V-
Conversion Result
Start Conversion
VTEMP
ADC3
ADC2
ADC1
ADC0
ADC4
PV4
PV3
PV2
PV1
NV
Interrupt
Note:
The shaded signals are scaled by 0.2,
other signals are scaled by 1.0
OLD DATA
INPUT
MUX
INVALID DATA
519 us
SIGMA-DELTA ADC
VREF
V-ADC MULTIPLEXER
8-BIT DATA BUS
V-ADC CONTROL
SEL. REG (VADMUX)
12-BIT
SGND
V-ADC CONVERSION COMPLETE IRQ
V A L I D
STATUS REG (VADCSR)
V-ADC DATA REGISTER
V-ADC CONTROL AND
D ATA
(VADCL/ADCH)
ATmega406
INVALID DATA
117