ATmega406 Atmel Corporation, ATmega406 Datasheet - Page 101

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ATmega406

Manufacturer Part Number
ATmega406
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega406

Flash (kbytes)
40 Kbytes
Pin Count
48
Max. Operating Frequency
1 MHz
Cpu
8-bit AVR
# Of Touch Channels
8
Hardware Qtouch Acquisition
No
Max I/o Pins
18
Ext Interrupts
4
Usb Speed
No
Usb Interface
No
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
12
Adc Speed (ksps)
1.9
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-30 to 85
I/o Supply Class
4.0 to 25
Operating Voltage (vcc)
4.0 to 25
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
3
Pwm Channels
2
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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16.6.2
16.6.3
2548E–AVR–07/06
TCNT1H and TCNT1L – Timer/Counter1
OCR1AH and OCR1AL – Output Compare Register 1 A
• Bit 2:0 – CS1[2:0]: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter.
Table 16-1.
The two Timer/Counter I/O locations (TCNT1H and TCNT1L, combined TCNT1) give direct
access, both for read and for write operations, to the Timer/Counter unit 16-bit counter. To
ensure that both the high and low bytes are read and written simultaneously when the CPU
accesses these registers, the access is performed using an 8-bit temporary high byte register
(TEMP). This temporary register is shared by all the other 16-bit registers. See “Accessing 16-bit
Registers” on page 96.
Modifying the counter (TCNT1) while the counter is running introduces a risk of missing a com-
pare match between TCNT1 and one of the OCR1x Registers.
Writing to the TCNT1 register blocks (removes) the compare match on the following timer clock
for all compare units.
The Output Compare Register contains a 16-bit value that is continuously compared with the
counter value (TCNT1).
The Output Compare Register is 16-bit in size. To ensure that both the high and low bytes are
written simultaneously when the CPU writes to these registers, the access is performed using an
8-bit temporary high byte register (TEMP). This temporary register is shared by all the other 16-
bit registers. See “Accessing 16-bit Registers” on page 96.
Bit
(0x85)
(0x84)
Read/Write
Initial Value
Bit
(0x89)
(0x88)
Read/Write
Initial Value
CS12
0
0
0
0
1
1
1
1
CS11
0
0
1
1
0
0
1
1
CS1[2:0] - Clock Select Bit Description
R/W
R/W
7
0
7
0
CS10
0
1
0
1
0
1
0
1
R/W
R/W
6
0
6
0
Description
No clock source (Timer/counter stopped).
clk
clk
clk
clk
clk
clk
clk
I/O
I/O
I/O
I/O
I/O
I/O
I/O
R/W
R/W
5
0
5
0
/1 (No prescaling)
/8 (From prescaler)
/32 (From prescaler)
/64 (From prescaler)
/128 (From prescaler)
/256 (From prescaler)
/1024 (From prescaler)
R/W
R/W
4
0
4
0
OCR1A[15:8]
TCNT1[15:8]
OCR1A[7:0]
TCNT1[7:0]
R/W
R/W
3
0
3
0
R/W
R/W
2
0
2
0
R/W
R/W
1
0
1
0
ATmega406
R/W
R/W
0
0
0
0
OCR1AH
OCR1AL
TCNT1H
TCNT1L
101

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