AT32UC3B0512AU Atmel Corporation, AT32UC3B0512AU Datasheet - Page 94

no-image

AT32UC3B0512AU

Manufacturer Part Number
AT32UC3B0512AU
Description
Manufacturer
Atmel Corporation

Specifications of AT32UC3B0512AU

Flash (kbytes)
512 Kbytes
Pin Count
64
Max. Operating Frequency
60 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
44
Ext Interrupts
44
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
4
Twi (i2c)
1
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
96
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3B0512AU-Z2U
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
9.1.2
9.1.3
9.1.4
94
AVR32
Operator Symbols
Operations
Status Register Flags
pairs. This is also
ure to do so will
instructions.
Some instructions access or use doubleword operands. These operands must be
placed in two consecutive register addresses where the first register must be an even
register. The even register contains the least significant part and the odd register con-
tains the most significant part. This ordering is reversed in comparison with how data is
organized in memory (where the most significant part would receive the lowest address)
and is intentional.
[i:j]
The programmer is responsible for placing these operands in properly aligned register
specified in the "Operands" section in the detailed description of each instruction. Fail-
result in an undefined behaviour.
¬
Sat
ASR(x, n)
Bits(x)
LSR(x, n)
LSL(x, n)
SATS(x, n)
SATSU(x, n)
SATU(x, n)
SE(x, n)
SE(x)
ZE(x, n)
ZE(x)
C:
Z:
N:
V:
Q:
M0:
Denotes bit i to j in an immediate value.
Number of bits in operand x
x >> n
x << n
Identical to SE(x, 32)
Identical to ZE(x, 32)
Bitwise logical AND operation.
Bitwise logical OR operation.
Bitwise logical EOR operation.
Bitwise logical NOT operation.
Saturate operand
SE(x, Bits(x) + n) >> n
Signed Saturation ( x is treated as a signed value ):
If (x > (2
Signed to Unsigned Saturation ( x is treated as a signed value ):
If (x > (2
Unsigned Saturation ( x is treated as an unsigned value ):
If (x > (2
Sign Extend x to an n-bit value
Zero Extend x to an n-bit value
Carry / Borrow flag.
Zero flag, set if the result of the operation is zero.
Bit 31 of the result.
Set if 2’s complement overflow occurred.
Saturated flag, set if saturation and/or overflow has occurred after some
Mode bit 0
n-1
n
n
-1)) then (2
-1)) then (2
-1)) then (2
n-1
n-1
n-1
-1); elseif ( x < 0 ) then 0; else x;
-1); else x;
-1); elseif (x < -2
n-1
) then -2
n-1
; else x;
32000D–04/2011

Related parts for AT32UC3B0512AU