AT32UC3B0512AU Atmel Corporation, AT32UC3B0512AU Datasheet - Page 306

• Manufacturer Part Number: AT32UC3B0512AU
• Manufacturer: Atmel Corporation

Specifications of AT32UC3B0512AU

• Flash (kbytes): 512 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 60 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 44
• Ext Interrupts: 44
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 4
• Twi (i2c): 1
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 96
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

306
AVR32
RETE – Return from event handler
Architecture revision:
Architecture revision1 and higher.
Description
Returns from an exception or interrupt. SREG[L] is cleared to support atomical memory access
with the stcond instruction. This instruction can only be executed in INT0-INT3, EX and NMI
modes. Execution in Application or Supervisor modes will trigger a Privilege Violation exception.
Operation:
I.
Syntax:
I
Operands:
Status Flags
If (microarchitecture == AVR32A)
else
RETE
None
Q:
V:
N:
Z:
C:
SR ← *(SP
PC ← *(SP
If ( SR[M2:M0] == {B’010, B’011, B’100, B’101} )
SREG[L] ← 0;
SR ← RSR
PC ← RAR
SREG[L] ← 0;
Not affected
Not affected
Not affected
Not affected
Not affected
LR ← *(SP
R12 ← *(SP
R11 ← *(SP
R10 ← *(SP
R9 ← *(SP
R8 ← *(SP
SYS
SYS
Current Context
Current Context
++)
++)
SYS
SYS
SYS
SYS
SYS
SYS
++)
++)
++)
++)
++)
++)
32000D–04/2011