AT32UC3B0512AU Atmel Corporation, AT32UC3B0512AU Datasheet - Page 49

• Manufacturer Part Number: AT32UC3B0512AU
• Manufacturer: Atmel Corporation

Specifications of AT32UC3B0512AU

• Flash (kbytes): 512 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 60 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 44
• Ext Interrupts: 44
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 4
• Twi (i2c): 1
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 96
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

5.3.3.4
32000D–04/2011
DTLB Modified
This exception is issued if a valid memory write operation is performed to a page that has never
been written before. This is detected by the Dirty-bit in the matching TLB entry reading zero.
1. Examine the TLBEAR and TLBEHI registers in order to identify the page that caused
2. Set the Dirty bit in the read page table entry and write this entry back to the page table
3. Use the fetched page table entry to update the necessary bits in PTEHI and PTELO.
4. The TLBEHI[I] register is updated by hardware to indicate that it was a DTLB miss.
5. Execute the tlbw instruction in order to update the TLB entry.
6. Finish the exception handling and return to the application by executing the rete
the fault. Use this to index the page table pointed to by PTBR and fetch the desired
page table entry.
The following bits must be updated: V, PFN, C, G, B, AP[2:0], SZ[1:0], W, D.
Ensure that MMUCR[DRP] points to the TLB entry to replace. An entry for the faulting
page must already exist in the DTLB, and MMUCR[DRP] must point to this entry, other-
wise multiple DTLB hits may occur.
instruction.
AVR32
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