DS3170+ Maxim Integrated Products, DS3170+ Datasheet - Page 88

• Manufacturer Part Number: DS3170+
• Description: IC TXRX DS3/E3 100-CSBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS3170+

• Function: Single-Chip Transceiver
• Interface: DS3, E3
• Number Of Circuits: 1
• Voltage - Supply: 3.135 V ~ 3.465 V
• Current - Supply: 120mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LBGA
• Includes: DS3 Framers, E3 Framers, HDLC Controller, On-Chip BERTs
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -

more of the indicated alarm conditions is present, and set to one when all of the indicated alarm conditions are
absent. Automatically setting RDI on LOS, SEF, LOF, or AIS is individually programmable (on or off).
The P-bits (P
payload parity is calculated by performing modulo 2 addition of all of the payload bits after all frame processing has
been completed. P-bit generation is programmable (on or off). The P-bits will be generated if either P-bit generation
is enabled or frame generation is enabled.
If C-bit generation is enabled, the bit C
bits (C
treated as payload data, and passed through. C-bit generation is programmable (on or off). Note: Overhead
insertion may still overwrite the C-bit time slots even if C-bit generation is disabled.
Once all of the DS3 overhead bits have been overwritten, the data stream is passed on to error insertion. If frame
generation is disabled, the incoming DS3 signal is passed on directly to error insertion. Frame generation is
programmable (on or off). Note: P-bit generation may still be performed even if frame generation is disabled.
10.6.6.3 Transmit M23 DS3 Error Insertion
Error insertion inserts various types of errors into the different DS3 overhead bits. The types of errors that can be
inserted are framing errors and P-bit parity errors.
The framing error insertion mode is programmable (F-bit, M-bit, SEF, or OOMF). An F-bit error is a single subframe
alignment bit (F
error in all the subframe alignment bits in a subframe (F
alignment bit (M
A P-bit parity error is generated by is inverting the value of the P-bits (P
error(s) can be inserted one error at a time, or continuously. The P-bit parity error insertion mode (single or
continuous) is programmable.
Each error type (framing or P-bit parity) has a separate enable. Continuous error insertion mode inserts errors at
every opportunity. Single error insertion mode inserts an error at the next opportunity when requested. The
framing multi-error insertion modes (SEF or OOMF) insert the indicated number of error(s) at the next opportunities
when requested; i.e., a single request will cause multiple errors to be inserts. The requests can be initiated by a
register bit(TSEI) or by the manual error insertion input (TMEI). The error insertion request source (register or
input) is programmable. The insertion of each particular error type is individually enabled. Once all error insertion
has been performed, the data stream is passed on to overhead insertion.
10.6.6.4 Transmit M23 DS3 Overhead Insertion
Overhead insertion can insert any (or all) of the DS3 overhead bits into the DS3 frame. The DS3 overhead bits X
X
TOHSOF). The P-bits (P
internally generated bit). The DS3 overhead insertion is fully controlled by the transmit overhead interface. If the
transmit overhead data enable signal (TOHEN) is driven high, then the bit on the transmit overhead signal (TOH) is
inserted into the output data stream. Insertion of bits using the TOH signal overwrites internal overhead insertion.
10.6.6.5 Transmit M23 DS3 AIS/Idle Generation
M23 DS3 AIS/Idle generation overwrites the data stream with AIS or an Idle signal. If transmit Idle is enabled, the
data stream payload is forced to a 1100 pattern with two ones immediately following each DS3 overhead bit. M
M
overwritten with the values one, zero, zero, and one (1001) respectively. X
P
are overwritten with 000.
If transmit AIS is enabled, the data stream payload is forced to a 1010 pattern with a one immediately following
each DS3 overhead bit. M
F
are overwritten with 11. P
And, C
2
2
X1
2
, P
, and M
are overwritten with the calculated payload parity from the previous output DS3 frame. And, C
, F
1
X2
, P
XY
X1
, F
, C
) are overwritten with zeros. If C-bit generation is disabled, then all of the C-bit timeslots (C
2
, M
3
X3
X2
bits are overwritten with the values zero, one, and zero (010) respectively. F
, and F
X
, and C
1
, F
and P
XY
1
, M
XY
) error. An M-bit error is a single multiframe alignment bit (M
, and C
X4
2
X3
, or M
2
) are both overwritten with the calculated payload parity from the previous DS3 frame. The
bits are overwritten with the values one, zero, zero, and one (1001) respectively. X
are overwritten with 000. AIS will overwrite a transmit Idle signal.
1
1
1
3
XY
, M
) error in each of two consecutive DS3 frames.
and P
and P
can be sourced from the transmit overhead interface (TOHCLK, TOH, TOHEN, and
2
, and M
2
2
) are received as an error mask (modulo 2 addition of the input bit and the
are overwritten with the calculated payload parity from the previous DS3 frame.
3
11
bits are overwritten with the values zero, one, and zero (010) respectively.
is overwritten with an alternating one zero pattern, and all of the other C-
88 of 230
X1
, F
X2
, F
X3
, and F
1
and P
X4
DS3170 DS3/E3 Single-Chip Transceiver
1
). An OOMF error is a single multiframe
and X
1
, M
2
) in a single DS3 frame. P-bit parity
2
, or M
2
are overwritten with 11. P
X1
3
) error. An SEF error is an
, F
X2
, F
X3
, and F
31
, C
32
XY
X4
, and C
) will be
1
bits are
and X
1
and
33
1
1
2
,
,