DS21552L+ Maxim Integrated Products, DS21552L+ Datasheet - Page 98
![IC TXRX T1 1-CHIP 5V 100-LQFP](/photos/6/82/68291/406-100-lqfp_sml.jpg)
DS21552L+
Manufacturer Part Number
DS21552L+
Description
IC TXRX T1 1-CHIP 5V 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheet
1.DS21352L.pdf
(137 pages)
Specifications of DS21552L+
Function
Single-Chip Transceiver
Interface
E1, HDLC, J1, T1
Number Of Circuits
1
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Includes
DSX-1 and CSU Line Build-Out Generator, HDLC Controller, In-Band Loop Code Generator and Detector
Product
Framer
Number Of Transceivers
1
Data Rate
64 Kbps
Supply Voltage (max)
3.465 V
Supply Voltage (min)
3.135 V
Supply Current (max)
75 mA (Typ)
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Ic Interface Type
Parallel, Serial
Supply Voltage Range
4.75V To 5.25V
Operating Temperature Range
0°C To +70°C
Digital Ic Case Style
LQFP
No. Of Pins
100
Filter Terminals
SMD
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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The DS21352/552 are enhanced versions of the DS2152 and are backward pin-compatible. The JTAG
feature uses pins that had no function in the DS2152. When using the JTAG feature, be sure FMS (pin
76) is tied LOW enabling the newly defined pins of the DS21352/552.
Architecture and the Test Access Port can be found in IEEE 1149.1-1990, IEEE 1149.1a-1993, and IEEE
1149.1b-1994.
The Test Access Port has the necessary interface pins; JTRST, JTCLK, JTMS, JTDI, and JTDO. See the
pin descriptions for details.
Figure 19-1 JTAG FUNCTIONAL BLOCK DIAGRAM
10K
+V
JTDI
10K
+V
JTMS
Test Access Port
Boundary Scan
Identification
Instruction
Bypass
Register
Controller
Register
Register
Register
JTCLK
98 of 137
10K
+V
JTRST
Select
Output Enable
MUX
Details on Boundary Scan
JTDO
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