DS21552L+ Maxim Integrated Products, DS21552L+ Datasheet - Page 117

• Manufacturer Part Number: DS21552L+
• Description: IC TXRX T1 1-CHIP 5V 100-LQFP
• Manufacturer: Maxim Integrated Products

Specifications of DS21552L+

• Function: Single-Chip Transceiver
• Interface: E1, HDLC, J1, T1
• Number Of Circuits: 1
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 75mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Includes: DSX-1 and CSU Line Build-Out Generator, HDLC Controller, In-Band Loop Code Generator and Detector
• Product: Framer
• Number Of Transceivers: 1
• Data Rate: 64 Kbps
• Supply Voltage (max): 3.465 V
• Supply Voltage (min): 3.135 V
• Supply Current (max): 75 mA (Typ)
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Ic Interface Type: Parallel, Serial
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 100
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 21-10 TRANSMIT SIDE BOUNDARY TIMING (with elastic store
disabled)
Notes:
1. TSYNC is in the output mode (TCR2.2 = 1)
2. TSYNC is in the input mode (TCR2.2 = 0)
3. TCHBLK is programmed to block channel 2
4. Shown is TLINK/TLCLK in the ESF framing mode
Figure 21-11 TRANSMIT SIDE 1.544 MHz BOUNDARY TIMING (with elastic
store enabled)
Notes:
1. TCHBLK is programmed to block channel 24 (if the TPCSI bit is set, then the signaling data at TSIG will be ignored during
channel 24).
TCHBLK
TSYSCLK
TCHCLK
TCHBLK
TCHCLK
TSSYNC
TSYNC
TSYNC
TLCLK
TLINK
TSER
TCLK
TSER
TSIG
TSIG
1
2
3
4
1
LSB
D/B
CHANNEL 23
CHANNEL 23
F
MSB
A
B
C/A D/B
LSB MSB
CHANNEL 1
CHANNEL 1
A
B
117 of 137
C/A
CHANNEL 24
CHANNEL 24
LSB MSB
D/B
DON'T CARE
A
B
C/A D/B
LSB
CHANNEL 2
CHANNEL 2
F MSB
A
B
CHANNEL 1
C/A
CHANNEL 1
LSB MSB
D/B
A