DS21552L+ Maxim Integrated Products, DS21552L+ Datasheet - Page 34

• Manufacturer Part Number: DS21552L+
• Description: IC TXRX T1 1-CHIP 5V 100-LQFP
• Manufacturer: Maxim Integrated Products

Specifications of DS21552L+

• Function: Single-Chip Transceiver
• Interface: E1, HDLC, J1, T1
• Number Of Circuits: 1
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 75mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Includes: DSX-1 and CSU Line Build-Out Generator, HDLC Controller, In-Band Loop Code Generator and Detector
• Product: Framer
• Number Of Transceivers: 1
• Data Rate: 64 Kbps
• Supply Voltage (max): 3.465 V
• Supply Voltage (min): 3.135 V
• Supply Current (max): 75 mA (Typ)
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Ic Interface Type: Parallel, Serial
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 100
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TCR2: TRANSMIT CONTROL REGISTER 2 (Address=36 Hex)
Table 6-2 OUTPUT PIN TEST MODES
TEST 1
SYMBOL
TEST1
(MSB)
TZBTSI
TD4YM
TB7ZS
TEST1
TEST0
TSDW
TSIO
0
0
1
1
TSM
TEST 0
0
1
0
1
TEST0
POSITION
TCR2.7
TCR2.6
TCR2.5
TCR2.4
TCR2.3
TCR2.2
TCR2.1
TCR2.0
EFFECT ON OUTPUT PINS
operate normally
force all output pins into 3–state (including all I/O pins and parallel port pins)
force all output pins low (including all I/O pins except parallel port pins)
force all output pins high (including all I/O pins except parallel port pins)
TZBTSI
NAME AND DESCRIPTION
Test Mode Bit 1 for Output Pins. See Table 6-2..
Test Mode Bit 0 for Output Pins. See Table 6-2.
Transmit Side ZBTSI Support Enable. Allows ZBTSI information to be input on
TLINK pin.
0 = ZBTSI disabled
1 = ZBTSI enabled
TSYNC Double–Wide. (note: this bit must be set to zero when TCR2.3=1 or when
TCR2.2=0)
0 = do not pulse double–wide in signaling frames
1 = do pulse double–wide in signaling frames
TSYNC Mode Select. Selects frame or multiframe mode for the TSYNC pin. See the
timing in Section 21
0 = frame mode
1 = multiframe mode
TSYNC I/O Select.
0 = TSYNC is an input
1 = TSYNC is an output
Transmit Side D4 Yellow Alarm Select.
0 = zeros in bit 2 of all channels
1 = a one in the S–bit position of frame 12
Transmit Side Bit 7 Zero Suppression Enable.
0 = no stuffing occurs
1 = Bit 7 force to a one in channels with all zeros
TSDW
34 of 137
TSM
TSIO
TD4YM
DS21352/DS21552
TB7ZS
(LSB)