UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 85

no-image

UPD78F0988AGC-8BS

Manufacturer Part Number
UPD78F0988AGC-8BS
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0988AGC-8BS

Lead Free Status / Rohs Status
Supplier Unconfirmed
3.4.7 Based addressing
[Function]
[Operand Format]
[Example]
This addressing is used to address the memory by using the result of adding 8-bit immediate data to the contents
of the HL register pair used as a base register. The HL register pair to be accessed is in the register bank specified
by the register bank select flags (RBS0 and RBS1). The addition is executed by extending the offset data to
16 bits as a positive number. A carry from the 16th bit is ignored. This addressing can address the entire memory
space.
MOV A, [HL + 10H]; To specify 10H as byte
Representation
[HL + byte]
Instruction code
CHAPTER 3 CPU ARCHITECTURE
User’s Manual U13029EJ7V1UD
1 0 1 0 1 1 1 0
0 0 0 1 0 0 0 0
Description
83

Related parts for UPD78F0988AGC-8BS