UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 177

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UPD78F0988AGC-8BS

Manufacturer Part Number
UPD78F0988AGC-8BS
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0988AGC-8BS

Lead Free Status / Rohs Status
Supplier Unconfirmed
9.4 Registers Controlling Watchdog Timer
The following three registers control the watchdog timer.
• Watchdog timer clock select register (WDCS)
• Watchdog timer mode register (WDTM)
• Oscillation stabilization time select register (OSTS)
(1) Watchdog timer clock select register (WDCS) (refer to Figure 9-2)
Note
Remark f
This register sets the overflow time of watchdog timer and interval timer.
WDCS is set by an 8-bit memory manipulation instruction.
RESET input clears this register to 00H.
Expanded-specification products only.
Symbol
WDCS
X
: System clock oscillation frequency
WDCS2
7
0
0
0
0
0
1
1
1
1
Figure 9-2. Format of Watchdog Timer Clock Select Register
WDCS1
6
0
0
0
1
1
0
0
1
1
WDCS0
5
0
0
1
0
1
0
1
0
1
CHAPTER 9 WATCHDOG TIMER
2
2
2
4
0
2
2
2
2
2
12
13
14
Watchdog timer/interval timer overflow time selection
15
16
17
18
20
User’s Manual U13029EJ7V1UD
/f
/f
/f
/f
/f
/f
/f
/f
X
X
X
X
X
X
X
X
3
0
341.3 s
682.6 s
1.36 ms
2.73 ms
5.46 ms
10.9 ms
21.8 ms
87.3 ms
At f
WDCS2 WDCS1 WDCS0
2
X
= 12 MHz
1
Note
0
488.8 s
977.6 s
1.96 ms
3.91 ms
7.82 ms
15.6 ms
31.3 ms
125.1 ms
At f
Address
FF42H
X
= 8.38 MHz
After reset
00H
R/W
R/W
175

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