UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 430

• Manufacturer Part Number: UPD78F0988AGC-8BS
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0988AGC-8BS

• Lead Free Status / Rohs Status: Supplier Unconfirmed

428
7th
Edition
Modification of Figure 8-2 Format of Inverter Timer Control Register 7
Modification of Table 9-1 Loop Detection Time of Watchdog Timer
Modification of Table 9-2 Interval Time
Modification of Figure 9-2 Format of Watchdog Timer Clock Select Register
Modification of Figure 9-4 Format of Oscillation Stabilization Time Select Register
Modification of Table 9-4 Loop Detection Time of Watchdog Timer
Modification of Table 9-5 Interval Time of Interval Timer
11.2 Configuration of A/D Converter
Addition of register figure to (2) A/D conversion result register 0 (ADCR0)
Modification of Figure 11-2 Format of A/D Converter Mode Register 0
11.5 Notes on A/D Converter
Addition of (6) Input impedance of ANI0 to ANI7 pins
Modification of Figure 12-9 Format of Baud Rate Generator Control Register 0
Modification of Figure 12-10 Format of Baud Rate Generator Control Register 1
12.4.2 Asynchronous serial interface (UART) mode
• Modification of description
• Modification of (1) Register setting (c) Baud rate generator control registers
0, 1 (BRGC00, BRGC01)
Modification of Table 12-2 Relationship Between Source Clock of 5-Bit Counter
and Value of m (with UART00)
Modification of Table 12-3 Relationship Between Source Clock of 5-Bit Counter
and Value of m (with UART01)
Modification of Table 12-4 Relationship Between System Clock and Baud Rate
Addition of Remark to 12.4.3 Infrared data transfer mode
Modification of Table 12-7 Baud Rate That Can Be Set in Infrared Data Transfer Mode
Modification of Figure 13-2 Format of Serial Operation Mode Register 3
Addition of Caution to 15.1 External Device Expansion Function
Change of R/W to W in Figure 15-2 Format of Memory Expansion Mode Register
Modification of Figure 16-1 Format of Oscillation Stabilization Time Select Register
Modification of Figure 16-3 Releasing HALT Mode by RESET Input
Modification of Figure 16-5 Releasing STOP Mode by RESET Input
Revision of descriptions on flash memory programming as 18.3 Flash Memory
Features
18.4.5 Entry RAM area
Modification of (c) Write time data
APPENDIX D REVISION HISTORY
User’s Manual U13029EJ7V1UD
Contents
CHAPTER 8 10-BIT
INVERTER CONTROL
TIMER
CHAPTER 9
WATCHDOG TIMER
CHAPTER 11
A/D CONVERTER
CHAPTER 12 SERIAL
INTERFACES UART00
AND UART01
CHAPTER 13 SERIAL
INTERFACE SIO3
CHAPTER 15
EXTERNAL DEVICE
EXPANSION FUNCTION
CHAPTER 16 STANDBY
FUNCTION
CHAPTER 18
PD78F0988A
Applied to:
(5/6)