UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 79

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UPD78F0988AGC-8BS

Manufacturer Part Number
UPD78F0988AGC-8BS
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0988AGC-8BS

Lead Free Status / Rohs Status
Supplier Unconfirmed
3.4 Operand Address Addressing
during instruction execution.
3.4.1 Implied addressing
The following methods are available to specify the register and memory (addressing) to undergo manipulation
[Function]
[Operand Format]
[Example]
This addressing is used to automatically (implicitly) address a register that functions as an accumulator (A or
AX) in the general-purpose register area.
The instruction words of the PD780988 Subseries that use implied addressing are as follows.
No specific operand format is used because the operand format is automatically determined by the instruction.
MULU X
The product between registers A and X is stored in register AX as a result of executing the multiply instruction
of 8 bits
MULU
DIVUW
ADJBA/ADJBS
ROR4/ROL4
Instruction
8 bits. In this operation, registers A and AX are specified by implied addressing.
Register A to store multiplicand and register AX to store product
Register AX to store dividend and quotient
Register A to store numeric value subject to decimal adjustment
Register A to store digit data subject to digit rotation
CHAPTER 3 CPU ARCHITECTURE
User’s Manual U13029EJ7V1UD
Register Specified by Implied Addressing
77

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