UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 244

• Manufacturer Part Number: UPD78F0988AGC-8BS
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0988AGC-8BS

• Lead Free Status / Rohs Status: Supplier Unconfirmed

242
• Range of baud rate tolerance
[1/(16 + k)].
Figure 12-11 shows an example of baud rate tolerance.
The range of baud rate tolerance depends on the number of bits in one frame and division ratio of the counter
Remark T: Source clock cycle of 5-bit counter
Baud rate tolerance (when k = 0) = 15.5/320
Basic timing
(clock cycle T)
High-speed clock
(clock cycle T’)
enabling normal
reception
Low-speed clock
(clock cycle T”)
enabling normal
reception
Figure 12-11. Baud Rate Tolerance Including Sampling Error (When k = 0)
CHAPTER 12 SERIAL INTERFACES UART00 AND UART01
START
START
START
30.45T
33.55T
32T
D0
User’s Manual U13029EJ7V1UD
D0
D0
60.9T
67.1T
64T
100 = 4.8438 (%)
256T
D7
D7
288T
D7
P
sampling
301.95T
304.5T
304T
Ideal
point
P
15.5T
STOP
320T
P
STOP
15.5T
335.5T
336T
STOP
Sampling error
0.5T
352T