UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 245

no-image

UPD78F0988AGC-8BS

Manufacturer Part Number
UPD78F0988AGC-8BS
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0988AGC-8BS

Lead Free Status / Rohs Status
Supplier Unconfirmed
(2) Communication operation
(a) Data format
Figure 12-12 shows transmit/receive data format.
One data frame consists of following bits:
• Start bits ..................
• Character bits .........
• Parity bits ................
• Stop bits ..................
The character bit length, parity bit and stop bit length for each data frame is specified by asynchronous
serial interface mode register n (ASIM0n).
When 7 bits are selected as the number of character bits, only the lower 7 bits (bits 0 to 6) are valid; in
transmission the most significant bit (bit 7) is ignored, and in reception the most significant bit (bit 7) is
always 0.
The serial transfer rate is selected by means of baud rate generator control register n (BRGC0n).
If a serial data receive error is generated, the receive error contents can be determined by reading the
status of asynchronous serial interface status register n (ASIS0n).
Remark n = 0, 1
Figure 12-12. Asynchronous Serial Interface Transmit/Receive Data Format
Start
bit
CHAPTER 12 SERIAL INTERFACES UART00 AND UART01
D0
1 bit
7 bits/8 bits
Even parity/odd parity/0 parity/no parity
1 bit/2 bits
D1
D2
User’s Manual U13029EJ7V1UD
Character bit
D3
One data frame
D4
D5
D6
D7
Parity
bit
Stop bit
243

Related parts for UPD78F0988AGC-8BS