UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 105

• Manufacturer Part Number: UPD78F0988AGC-8BS
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0988AGC-8BS

• Lead Free Status / Rohs Status: Supplier Unconfirmed

5.5 Operation of Clock Generator
standby mode.
The clock generator generates the following clocks and controls the operation modes of the CPU, such as the
• System clock
• CPU clock
• Clock to peripheral hardware
The operation of the clock generator is determined by the processor clock control register (PCC), as follows.
(a) The slowest mode (2.6 s @ 12 MHz operation, 3.8 s @ 8.38 MHz operation) of the system clock is selected
(b) Five types of minimum instruction execution time (0.166 s, 0.33 s, 0.66 s, 1.3 s, and 2.6 s @ 12 MHz
(c) Two standby modes, STOP and HALT, can be used.
(d) The clock to the peripheral hardware is supplied by dividing the system clock. Therefore, the other peripheral
when the RESET signal is generated (PCC = 04H). While a low level is input to the RESET pin, oscillation
of the system clock is stopped.
operation/0.238 s, 0.48 s, 0.96 s, 1.9 s, and 3.8 s @ 8.38 MHz operation) can be selected via a PCC
setting when the system clock is in the selected state.
hardware is stopped when the system clock is stopped (except, however, the external clock input operation).
f
CPU
f
X
CHAPTER 5 CLOCK GENERATOR
User’s Manual U13029EJ7V1UD
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