UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 160

• Manufacturer Part Number: UPD78F0988AGC-8BS
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0988AGC-8BS

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Count clock
INTTM51
TCE51
TCE52
158
TM51
TM52
CR51
CR52
TO51
(2) Cascade (16-bit timer) mode (TM51 and TM52)
<Setting>
The 16-bit resolution timer/event counter mode is set by setting bit 4 (TMC524) of 8-bit timer mode control
register 52 (TMC52) to 1.
In this mode, TM51 and TM52 operate as a 16-bit interval timer that repeatedly generates an interrupt request
at intervals specified by the count value preset to 8-bit compare registers 51 and 52 (CR51 and CR52).
<1> Set each register.
<2> By setting TCE52 to 1 for TMC52 first, and then setting TCE51 to 1 for TMC51, the count operation is
<3> When the value of TM51 connected in cascade matches the value of CR51, TM51 generates INTTM51
<4> After that, INTTM51 is repeatedly generated at the same interval.
Cautions 1. Be sure to set the compare registers (CR51 and CR52) after stopping the timer operation.
Figure 7-17 shows an example of timing in the 16-bit resolution cascade mode.
00H
00H
Operation enabled
Counting starts
• TCL51:
• CR51 and CR52:
• TMC51 and TMC52: Select the mode that clears and starts the timer on a match between TM51 and
started.
(TM51 and TM52 are cleared to 00H).
01H
2. Even if the timers are connected in cascade, TM52 generates INTTM52 when the count
3. Set TCE51 and TCE52 in the order of TM52, then TM51.
4. Counting can be started or stopped by setting (1) or clearing (0) only TCE51 of TM51.
Figure 7-17. 16-Bit Resolution Cascade Mode (with TM51 and TM52)
value of TM52 matches the value of CR52. Be sure to mask TM52 to disable it from
generating an interrupt.
M
N
N
N + 1
CHAPTER 7 8-BIT TIMER/EVENT COUNTER
TM51 selects a count clock.
TM52, which is connected in cascade, does not have to be set.
Compare values (each compare value can be set in the range of 00H to FFH).
CR51 (TM52 and CR52).
FFH
TM51
TM52
User’s Manual U13029EJ7V1UD
00H
01H
Interval time
TMC51 = 0000
TMC52 = 0001
FFH
00H
02H
M – 1
FFH
0B
0B
00H
M
: don’t care
: don’t care
01H
N
Interrupt request generated
Level inverted
Counter cleared
00H
00H
01H
A
B
Operation stops
00H
00H