WG82577LM S LGWR Intel, WG82577LM S LGWR Datasheet - Page 54

• Manufacturer Part Number: WG82577LM S LGWR
• Manufacturer: Intel

Specifications of WG82577LM S LGWR

• Lead Free Status / Rohs Status: Supplier Unconfirmed

8.0
8.1
47
Programmer’s Visible State
Terminology
This document names registers as follows.
R/W
R/W S
RO
WO
R/WC
R/W SC
RO/LH
RO/LL
RO/SC
RW0
RWP
Shorthand
• By register number
• By page and register number
• By name
— Registers 0-15 are independent of the page and can be designated by their
— When a register number is used for registers 16-21, or 23-28, it refers to the
— Register 31 in PHY address 01, is the page register itself and doesn’t belong to
— This can be written out as page x, register y, but is often abbreviated x.y
— Most functional registers also have a name.
register number.
register in page 0.
any page. It is always written as register 31.
Read/Write. A register with this attribute can be read and written. If written since reset, the
value read reflects the value written.
Read/Write Status. A register with this attribute can be read and written. This bit represents
status of some sort, so the value read might not reflect the value written.
Read Only. If a register is read only, writes to this register have no effect.
Write Only. Reading this register might not return a meaningful value.
Read/Write Clear. A register bit with this attribute can be read and written. However, a write of
1b clears (sets to 0b) the corresponding bit and a write of 0b has no effect.
Read/Write Self Clearing. When written to 1b the bit causes an action to be initiated. Once the
action is complete the bit return to 0b.
Read Only, Latch High. The bit records an event or the occurrence of a condition to be recorded.
When the event occurs the bit is set to 1b. After the bit is read, it returns to 0b unless the event
is still occurring.
Read Only, Latch Low. The bit records an event. When the event occurs the bit is set to 0b. After
the bit is read, it reflects the current status.
Read Only, Self Clear. Writes to this register have no effect. Reading the register clears (set to
0b) the corresponding bits.
Ignore Read, Write Zero. The bit is a reserved bit. Any values read should be ignored. When
writing to this bit always write as 0b.
Ignore Read, Write Preserving. This bit is a reserved bit. Any values read should be ignored.
However, they must be saved. When writing the register the value read out must be written
back. (There are currently no bits that have this definition.)
Description
82577 GbE PHY—Programmer’s Visible State