WG82577LM S LGWR Intel, WG82577LM S LGWR Datasheet - Page 108
WG82577LM S LGWR
Manufacturer Part Number
WG82577LM S LGWR
Description
Manufacturer
Intel
Datasheet
1.WG82577LM_S_LGWR.pdf
(195 pages)
Specifications of WG82577LM S LGWR
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9.3.1.14
101
OEM Configuration Defaults (Word 0x17)
This word defines the OEM fields for the PHY power management parameters loaded to
the PHY Control (PHY_CTRL) register.
15
14
13:12
11
10
9
8
7:0
Bits
Reserved
Reserved
GbE Disable
Reserved
GbE Disable in
non-D0a
LPLU Enable in
non-D0a
LPLU Enable in
D0a
Reserved
Name
0b
0b
00b
1b
1b
0b
0b
0x0
Default
Reserved, set to 0b.
When set, GbE operation is disabled in all power states (including
D0a).
Reserved, set to 00b.
Disables GbE operation in non-D0a states. This bit must be set if GbE
Disable (bit 14) is set.
Low Power Link Up
Enables a decrease in link speed in non-D0a states when power
policy and power management states dictate so. This bit must be set
if LPLU Enable in D0a bit is set.
Low Power Link Up
Enables a decrease in link speed in all power states.
Reserved, set to 0b.
Reserved.
82577 GbE PHY—Non-Volatile Memory (NVM)
Description
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