WG82577LM S LGWR Intel, WG82577LM S LGWR Datasheet - Page 21
WG82577LM S LGWR
Manufacturer Part Number
WG82577LM S LGWR
Description
Manufacturer
Intel
Datasheet
1.WG82577LM_S_LGWR.pdf
(195 pages)
Specifications of WG82577LM S LGWR
Lead Free Status / Rohs Status
Supplier Unconfirmed
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Pin Interface—82577 GbE PHY
3.1.6
Note:
3.1.7
3.1.8
Testability Pins (5)
The 82577 uses the JTAG interface to support XOR files for manufacturing test. BSDL is
not supported.
Power Pins (13)
LVR Power and Control Pins (3)
Pin Name
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
TEST_EN
Pin Name
VDD1P0
VDD3P3_OUT
VDD3P3
VDD3P3_IN
Pin Name
CTRL1P0
VCT
Pin #
Pin #
Pin #
8, 11, 16, 22,
7
6
35
32
34
33
30
37, 40, 43,
15, 19, 29
46, 47
4
5
Type
Analog
Analog
Type Op Mode Name and Function
T/s
PU
PU
In
In
In
In
Connect to the base of the PNP, if desired. Otherwise, leave as a No
Connect.
Leave as a no connect.
Name and Function
Type
Output
Power
Power
Power
Power
Input
Input
Input
Input
JTAG clock input.
JTAG TDI input.
JTAG TDO output.
JTAG TMS input.
Should be connected to ground through a 1 K resistor, when
connected to logic 1b and test mode is enabled.
Name and Function
1.0 Vdc supply.
Note: Can also be connected to the Intel® 5 Series Express
Chipset Switching Voltage Regulator (SVR).
Regulator output. Connect to GND through a 1 µF capacitor.
Connect to GND through a 1 µF capacitor.
3.3 Vdc supply.
Note: Make sure the 3.3 Vdc supply is connected to auxiliary
power (available in all low power states).
14
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