WG82577LM S LGWR Intel, WG82577LM S LGWR Datasheet - Page 41

• Manufacturer Part Number: WG82577LM S LGWR
• Manufacturer: Intel

Specifications of WG82577LM S LGWR

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Device Functionality—82577 GbE PHY
7.3.1
Note:
Figure 8.
Note:
MAC Control Frames and Reception of Flow Control Packets
Three comparisons are used to determine the validity of a flow control frame:
The 802.3x standard defines the MAC control frame multicast address as 01-80-C2-00-
00-01. The flow control packet’s Type field is checked to determine if it is a valid flow
control packet: XON or XOFF. 802.3x reserves this as 0x8808. The final check for a
valid PAUSE frame is the MAC Control Opcode field. At this time only the PAUSE control
frame opcode is defined and has a value of 0x0001. Frame-based flow control
differentiates XOFF from XON based on the value of the PAUSE Timer field. Non-zero
values constitute XOFF frames while a value of zero constitutes an XON frame. Values
in the Timer field are in units of slot time. A slot time is hardwired to 64 byte times.
An XON frame signals cancelling the pause from being initiated by an XOFF frame
(pause for zero slot times).
802.3x MAC Control Frame Format
Where S is the start-of-packet delimiter and T is the first part of the end-of-packet
delimiter for 802.3z encapsulation. The receiver is enabled to receive flow control
frames if flow control is enabled via the RFCE bit in the Device Control (CTRL) register.
Flow control capability must be negotiated between link partners via the auto-
negotiation process. The auto-negotiation process might modify the value of these bits
based on the resolved capability between the local device and the link partner.
1. A match on the six-byte multicast address for MAC control frames or to the station
2. A match on the type field
3. A comparison of the MAC Control Opcode field
address of the device (Receive Address Register 0).
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