WG82577LM S LGWR Intel, WG82577LM S LGWR Datasheet - Page 157

no-image

WG82577LM S LGWR

Manufacturer Part Number
WG82577LM S LGWR
Description
Manufacturer
Intel
Datasheet

Specifications of WG82577LM S LGWR

Lead Free Status / Rohs Status
Supplier Unconfirmed
Intel
Note:
®
5 Series Express Chipset MAC Programming Interface—82577 GbE PHY
PCSS IPPCSE: The PCSS and the IPPCSE control the packet checksum calculation. As
previously noted, the packet checksum shares the same location as the RSS field. The
packet checksum is reported in the receive descriptor when the RXCSUM.PCSD bit is
cleared.
If RXCSUM.IPPCSE cleared (the default value), the checksum calculation that is
reported in the Rx packet checksum field is the unadjusted 16 bit ones complement of
the packet. The packet checksum starts from the byte indicated by RXCSUM.PCSS
(zero corresponds to the first byte of the packet), after VLAN stripping if enabled (by
CTRL.VME). For example, for an Ethernet II frame encapsulated as an 802.3ac VLAN
packet and with RXCSUM.PCSS set to 14, the packet checksum would include the entire
encapsulated frame, excluding the 14-byte Ethernet header (DA, SA, type/length) and
the 4-byte VLAN tag. The packet checksum does not include the Ethernet CRC if the
RCTL.SECRC bit is set. Software must make the required offsetting computation (to
back out the bytes that should not have been included and to include the pseudo-
header) prior to comparing the packet checksum against the TCP checksum stored in
the packet.
If the RXCSUM.IPPCSE is set, the packet checksum is aimed to accelerate checksum
calculation of fragmented UDP packets.
The PCSS value should not exceed a pointer to IP header start or else it erroneously
calculates IP header checksum or TCP/UDP checksum.
RXCSUM.IPOFLD is used to enable the IP Checksum offloading feature. If
RXCSUM.IPOFLD is set to one, the MAC calculates the IP checksum and indicate a pass/
fail indication to software via the IP Checksum Error bit (IPE) in the ERROR field of the
receive descriptor. Similarly, if RXCSUM.TUOFLD is set to one, the MAC calculates the
TCP or UDP checksum and indicate a pass/fail indication to software via the TCP/UDP
Checksum Error bit (TCPE). Similarly, if RFCTL.IPv6_DIS and RFCTL.IP6Xsum_DIS are
cleared to zero and RXCSUM.TUOFLD is set to one, the MAC calculates the TCP or UDP
checksum for IPv6 packets. It then indicates a pass/fail condition in the TCP/UDP
Checksum Error bit (RDESC.TCPE).
This applies to checksum offloading only. Supported frame types:
This register should only be initialized (written) when the receiver is not enabled (only
write this register when RCTL.EN = 0).
Legacy Rx descriptor
(RCTL.DTYP = 00b)
Extended or header split Rx
descriptor
(RCTL.DTYP = 01b)
• Ethernet II
• Ethernet SNAP
RXCSUM.PCSD
Packet checksum is reported in the
Rx descriptor
Packet checksum and IP
identification are reported in the Rx
descriptor
0 (Checksum Enable)
Not supported
RSS hash value is reported in the Rx
descriptor
1 (Checksum Disable)
150

Related parts for WG82577LM S LGWR