WG82577LM S LGWR Intel, WG82577LM S LGWR Datasheet - Page 18
WG82577LM S LGWR
Manufacturer Part Number
WG82577LM S LGWR
Description
Manufacturer
Intel
Datasheet
1.WG82577LM_S_LGWR.pdf
(195 pages)
Specifications of WG82577LM S LGWR
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3.0
3.1
Note:
3.1.1
11
Pin Interface
Pin Assignment
The 82577 is packaged in a 48-pin package, 6 x 6 mm with a 0.4 mm lead pitch. There
are 48 pins on the periphery and a die pad (Exposed Pad*) for ground.
Refer to the reference schematics for pin connection details. Contact your Intel
representative for access.
Signal Type Definitions
In
I
Out (O)
T/s
S/t/s
O/d
Analog
A-in
A-out
B
Signal Type
Input is a standard input-only signal.
A standard input-only signal.
Totem pole output is a standard active driver.
Tri-state is a bi-directional, tri-state input/output pin.
Sustained tri-state is an active low tri-state signal owned and driven by one and only one
agent at a time. The agent that drives an s/t/s pin low must drive it high for at least one
clock before letting it float. A new agent cannot start driving an s/t/s signal any sooner than
one clock after the previous owner tri-states it.
Open drain enables multiple devices to share as a wire-OR.
Analog input/output signal.
Analog input signal.
Analog output signal.
Input bias
Definition
82577 GbE PHY—Pin Interface
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