PSB3186FV1.4 Infineon Technologies, PSB3186FV1.4 Datasheet - Page 126
![no-image](/images/manufacturer_photos/0/3/327/infineon_technologies_sml.jpg)
PSB3186FV1.4
Manufacturer Part Number
PSB3186FV1.4
Description
ISDN Interface ISDN
Manufacturer
Infineon Technologies
Datasheet
1.PSB3186FV1.4.pdf
(207 pages)
Specifications of PSB3186FV1.4
Control Type
HDLC
Data Rate
192 Kbps
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Package / Case
MQFP-64
Lead Free Status / Rohs Status
Details
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- Download datasheet (3Mb)
3.9
The ISAC-SX TE provides test and diagnostic functions for the S-interface and the D-
channel:
• Digital loop via TLP (Test Loop, TMD register) command bit
Figure 67
• Test of layer-2 functions while disabling all layer-1 functions and pins associated with
Data Sheet
of layer 2 is internally connected with the RX path of layer 2. The output from layer 1
(S/T) on DD is ignored. This is used for testing ISAC-SX TE functionality excluding
layer 1 (loopback between XFIFOD and RFIFOD).
them (including clocking) via bit TR_CONF0.DIS_TR. The HDLC controllers can still
operate via IOM-2. DCL and FSC pins become input.
Test Functions
TMD.TLP = ’0’
Layer 2 Test Loops
126
Description of Functional Blocks
TMD.TLP = ’1’
(Figure
67): The TX path
PSB 3186
PSF 3186
2000-08-23
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