PSB3186FV1.4 Infineon Technologies, PSB3186FV1.4 Datasheet - Page 117

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PSB3186FV1.4

Manufacturer Part Number
PSB3186FV1.4
Description
ISDN Interface ISDN
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB3186FV1.4

Control Type
HDLC
Data Rate
192 Kbps
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Package / Case
MQFP-64
Lead Free Status / Rohs Status
 Details
The ISAC-SX TE indicates to the host that a new data block can be read from the
RFIFOD by means of an RPF interrupt (see previous chapter). User data is stored in the
RFIFOD and information about the received frame is available in the RBCLD and
RBCHD registers and the RSTAD byte which are listed in
Table 15
Information
Type of frame
(Command/
Response)
Recognition of SAPI
Recognition of TEI
Result of CRC check
(correct/incorrect)
Valid Frame
Abort condition detected
(yes/no)
Data overflow during reception
of a frame (yes/no)
Number of bytes received in
RFIFO
Message length
RFIFO Overflow
The RSTAD register is always appended in the RFIFOD as last byte to the end of a
frame.
Note: The number of bytes received in RFIFOD depends on the selected receive FIFO
Data Sheet
threshold (EXMD.RFBS).
Receive Information at RME Interrupt
Register
RSTAD
RSTAD
RSTAD
RSTAD
RSTAD
RSTAD
RSTAD
RBCL
RBCLD
RBCHD
RBCHD
117
Bit
C/R
SA1, 0
TA
CRC
VFR
RAB
RDO
RBC4-0
RBC11-0 All
OV
Description of Functional Blocks
Mode
Non-auto mode,
2-byte address field
Transparent mode 1
Non-auto mode,
2-byte address field
Transparent mode 1
All except
transparent mode 0
All
All
All
All
All
All
Table
15.
PSB 3186
PSF 3186
2000-08-23

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