PSB3186FV1.4 Infineon Technologies, PSB3186FV1.4 Datasheet - Page 109
![no-image](/images/manufacturer_photos/0/3/327/infineon_technologies_sml.jpg)
PSB3186FV1.4
Manufacturer Part Number
PSB3186FV1.4
Description
ISDN Interface ISDN
Manufacturer
Infineon Technologies
Datasheet
1.PSB3186FV1.4.pdf
(207 pages)
Specifications of PSB3186FV1.4
Control Type
HDLC
Data Rate
192 Kbps
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Package / Case
MQFP-64
Lead Free Status / Rohs Status
Details
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Transparent mode 0 (MDS2-0 = ’110’).
Characteristics:
Every received frame is stored in RFIFOD (first byte after opening flag to CRC field).
Additional information can be read from RSTAD.
Transparent mode 1 (MDS2-0 = ’111’).
Characteristics:
A comparison is performed on the first byte after the opening flag with SAP1, SAP2 and
“group” SAPI (FE
RFIFOD. Additional information can be read from RSTAD.
Transparent mode 2 (MDS2-0 = ’101’).
Characteristics:
A comparison is performed only on the second byte after the opening flag, with TEI1,
TEI2 and group TEI (FF
RFIFOD. Additional information is available in RSTAD.
Extended transparent mode (MDS2-0 = ’100’).
Characteristics:
In extended transparent mode fully transparent data transmission/reception without
HDLC framing is performed i.e. without FLAG generation/recognition, CRC generation/
check, bitstuffing mechanism. This allows user specific protocol variations.
Also refer to
Data Sheet
Chapter
H
/FC
TEI recognition
fully transparent
no address recognition
SAPI recognition
3.8.5.
H
). In the case of a match, all the following bytes are stored in
H
). In case of a match the rest of the frame is stored in the
109
Description of Functional Blocks
PSB 3186
PSF 3186
2000-08-23
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