ADF7023-JBCPZ Analog Devices Inc, ADF7023-JBCPZ Datasheet - Page 84
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ADF7023-JBCPZ
Manufacturer Part Number
ADF7023-JBCPZ
Description
TXRX FSK/GFSK/MSK/GMSK 32LFCSP
Manufacturer
Analog Devices Inc
Series
-r
Datasheet
1.EVAL-ADF7023-JDB1Z.pdf
(100 pages)
Specifications of ADF7023-JBCPZ
Frequency
902MHz ~ 958MHz
Data Rate - Maximum
300kbps
Modulation Or Protocol
FSK, GFSK, GMSK, MSK
Applications
ISM
Power - Output
13.5dBm
Sensitivity
-116dBm
Voltage - Supply
2.2 V ~ 3.6 V
Current - Receiving
12.8mA
Current - Transmitting
32.1mA
Data Interface
PCB, Surface Mount
Memory Size
-
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
32-WFQFN Exposed Pad, CSP
Rf Ic Case Style
LFCSP
No. Of Pins
32
Supply Voltage Range
2.2V To 3.6V
Operating Temperature Range
-40°C To +85°C
Transmitting Current
32.1mA
Data Rate
300Kbps
Modulation Type
2FSK, GFSK, MSK
Rohs Compliant
Yes
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
ADF7023-J
Bit
[2:0]
Table 71. 0x115: RADIO_CFG_9
Bit
[7:6]
[5:3]
[2:0]
Table 72. 0x116: RADIO_CFG_10
Bit
[7:5]
[4]
[3:2]
[1:0]
Name
PA_RAMP
Name
IFBW
MOD_SCHEME
DEMOD_SCHEME
Name
Reserved
AFC_POLARITY
AFC_SCHEME
AFC_LOCK_MODE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Sets the PA ramp rate. The PA ramps at the programmed rate until it reaches the level indicated by the
PA_LEVEL_MCR (Address 0x307) setting. The ramp rate is dependent on the programmed data rate.
PA_RAMP
0
1
2
3
4
5
6
To ensure the correct PA ramp-up and ramp-down timing, the PA ramp rate has a minimum value based
on the data rate and the PA_LEVEL or PA_LEVEL_MCR settings. This minimum value is described by
where PA_LEVEL_MCR is related to the PA_LEVEL setting by PA_LEVEL_MCR = 4 × PA_LEVEL + 3.
Description
Sets the receiver IF filter bandwidth. Note that setting an IF filter bandwidth of 300 kHz automatically
changes the receiver IF frequency from 200 kHz to 300 kHz.
IFBW
0
1
2
3
Sets the transmitter modulation scheme.
MOD_SCHEME
0
1
2
3
4 to 7
Sets the receiver demodulation scheme.
DEMOD_SCHEME
0
1
2
3 to 7
Description
Set to 0.
Set to 0.
Set to 2.
Sets the AFC mode.
AFC_LOCK_MODE
0
1
2
3
Ramp
Rate(Codes
/Bit)
Rev. 0 | Page 84 of 100
<
2500
×
PA_LEVEL_M
DATA_RATE[
Mode
Free running: AFC is free running.
Disabled: AFC is disabled.
Hold AFC: AFC is paused.
Lock: AFC locks after the preamble or sync word (only
locks on a sync word if PREAMBLE_MATCH = 0).
IF Bandwidth (kHz)
100
150
200
300
Modulation Scheme
Two-level 2FSK/MSK
Two-level GFSK/GSMK
Reserved
Carrier only
Reserved
Demodulation Scheme
2FSK/GFSK/MSK/GMSK
Reserved
Reserved
Reserved
CR[5
11
:
0]
:
0]
Ramp Rate
Reserved
256 codes per data bit
128 codes per data bit
64 codes per data bit
32 codes per data bit
16 codes per data bit
Eight codes per data bit