ADF7023-JBCPZ Analog Devices Inc, ADF7023-JBCPZ Datasheet - Page 81
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ADF7023-JBCPZ
Manufacturer Part Number
ADF7023-JBCPZ
Description
TXRX FSK/GFSK/MSK/GMSK 32LFCSP
Manufacturer
Analog Devices Inc
Series
-r
Datasheet
1.EVAL-ADF7023-JDB1Z.pdf
(100 pages)
Specifications of ADF7023-JBCPZ
Frequency
902MHz ~ 958MHz
Data Rate - Maximum
300kbps
Modulation Or Protocol
FSK, GFSK, GMSK, MSK
Applications
ISM
Power - Output
13.5dBm
Sensitivity
-116dBm
Voltage - Supply
2.2 V ~ 3.6 V
Current - Receiving
12.8mA
Current - Transmitting
32.1mA
Data Interface
PCB, Surface Mount
Memory Size
-
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
32-WFQFN Exposed Pad, CSP
Rf Ic Case Style
LFCSP
No. Of Pins
32
Supply Voltage Range
2.2V To 3.6V
Operating Temperature Range
-40°C To +85°C
Transmitting Current
32.1mA
Data Rate
300Kbps
Modulation Type
2FSK, GFSK, MSK
Rohs Compliant
Yes
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Table 52. 0x102: NUMBER_OF_WAKEUPS_0
Bit
[7:0]
Table 53. 0x103: NUMBER_OF_WAKEUPS_1
Bit
[7:0]
Table 54. 0x104: NUMBER_OF_WAKEUPS_IRQ_THRESHOLD_0
Bit
[7:0]
Table 55. 0x105: NUMBER_OF_WAKEUPS_IRQ_THRESHOLD_1
Bit
[7:0]
Table 56. 0x106: RX_DWELL_TIME
Bit
[7:0]
Table 57. 0x107: PARMTIME_DIVIDER
Bit
[7:0]
Table 58. 0x108: SWM_RSSI_THRESH
Bit
[7:0]
Table 59. 0x109: CHANNEL_FREQ_0
Bit
[7:0]
Name
NUMBER_OF_WAKEUPS_IRQ_THRESHOLD[7:0]
Name
NUMBER_OF_WAKEUPS_IRQ_THRESHOLD[15:8]
Name
RX_DWELL_TIME
Name
PARMTIME_DIVIDER
Name
SWM_RSSI_THRESH
Name
CHANNEL_FREQ[7:0]
Name
NUMBER_OF_WAKEUPS[15:8]
Name
NUMBER_OF_WAKEUPS[7:0]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Rev. 0 | Page 81 of 100
Description
Bits[7:0] of [15:0] of an internal 16-bit count of the number of wake-ups
(WUC timeouts) the device has gone through. It can be initialized to 0x0000.
See Table 53.
Description
Bits[15:8] of [15:0] of an internal 16-bit count of the number of WUC wake-ups
the device has gone through. It can be initialized to 0x0000. See Table 52.
Description
Bits[7:0] of [15:0] (see Table 55). The threshold for the number of wake-ups
(WUC timeouts). It is a 16-bit count threshold that is compared against the
NUMBER_OF_WAKEUPS bits. When this threshold is exceeded, the device
wakes up in the PHY_OFF state and optionally generates
INTERRUPT_NUM_WAKEUPS.
Description
Bits[15:8] of [15:0] (see Table 54).
Description
When the WUC is used and SWM is enabled, the radio powers up and
enables the receiver on the channel defined in the BBRAM and listens for
this period of time. If no preamble pattern is detected in this period, the
device goes back to sleep.
Description
Units of time used to define the RX_DWELL_TIME time period.
A value of 0x33 gives a clock of 995.7 Hz or a period of 1.004 ms.
Description
This sets the RSSI threshold when in smart wake mode with RSSI detection
enabled.
Description
The RF channel frequency in hertz is set according to
where f
Receive Dwell Time (s) = RX_DWELL_TIME ×
Timer Tick Rate =
Threshold (dBm) = SWM_RSSI_THRESH − 107
Frequency
128
PFD
×
is the PFD frequency and is equal to 26 MHz.
PARMTIME_D
6.5
(Hz)
MHz
=
f
PFD
128
IVIDER
×
×
(
CHANNEL_FR
PARMTIME_D
6.5
MHz
2
16
EQ[23
IVIDER
:
0]
)
ADF7023-J