ADF7023-JBCPZ Analog Devices Inc, ADF7023-JBCPZ Datasheet - Page 50

• Manufacturer Part Number: ADF7023-JBCPZ
• Description: TXRX FSK/GFSK/MSK/GMSK 32LFCSP
• Manufacturer: Analog Devices Inc
• Series: -r

Specifications of ADF7023-JBCPZ

• Frequency: 902MHz ~ 958MHz
• Data Rate - Maximum: 300kbps
• Modulation Or Protocol: FSK, GFSK, GMSK, MSK
• Applications: ISM
• Power - Output: 13.5dBm
• Sensitivity: -116dBm
• Voltage - Supply: 2.2 V ~ 3.6 V
• Current - Receiving: 12.8mA
• Current - Transmitting: 32.1mA
• Data Interface: PCB, Surface Mount
• Memory Size: -
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-WFQFN Exposed Pad, CSP
• Rf Ic Case Style: LFCSP
• No. Of Pins: 32
• Supply Voltage Range: 2.2V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Transmitting Current: 32.1mA
• Data Rate: 300Kbps
• Modulation Type: 2FSK, GFSK, MSK
• Rohs Compliant: Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

ADF7023-J
Table 26. FW_STATE Description
Value
0x0F
0x00
0x11
0x12
0x13
0x14
0x06
0x05
0x07
0x08
0x09
0x0A
PROCESSOR ACTION
PROCESSOR ACTION
COMMUNICATIONS
COMMUNICATIONS
STATUS WORD
STATUS WORD
Figure 62. Operation of the CMD_READY and FW_STATE Bits in Transitioning the ADF7023-J from the PHY_OFF State to the PHY_ON State
CMD_READY
CMD_READY
FW_STATE
FW_STATE
CS
CS
Figure 63. Command Queuing and Operation of the CMD_READY and FW_STATE Bits in Transitioning the ADF7023-J
State
Initializing
Busy, performing a state transition
PHY_OFF
PHY_ON
PHY_RX
PHY_TX
PHY_SLEEP
Performing CMD_GET_RSSI
Performing CMD_IR_CAL
Performing CMD_AES_DECRYPT_INIT
Performing CMD_AES_DECRYPT
Performing CMD_AES_ENCRYPT
WAITING FOR COMMAND
WAITING FOR COMMAND
= 0x11 (PHY_OFF)
= 0x11 (PHY_OFF)
0xB1
0xB1
from the PHY_OFF State to the PHY_ON State and Then to the PHY_RX State
CMD_PHY_ON
CMD_PHY_ON
ISSUE
ISSUE
0x80
0x80
TRANSITION RADIO FROM
TRANSITION RADIO FROM
PHY_OFF TO PHY_ON
PHY_OFF TO PHY_ON
CMD_PHY_RX
0xA0
= 0x00 (BUSY)
= 0x00 (BUSY)
ISSUE
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0xA0
0x80
IN PHY_ON, READING
NEW COMMAND
COMMAND QUEUING
The CMD_READY status bit is used to indicate that the command
queue used by the communications processor is empty. The queue
is one command deep. The FW_STATE bit is used to indicate
the state of the communications processor. The operation of the
status word and these bits is illustrated in Figure 62 when a
CMD_PHY_ON command is issued in the PHY_OFF state.
Operation of the status word when a command is being queued
is illustrated in Figure 63 when a CMD_PHY_ON command is
issued in the PHY_OFF state followed quickly by a CMD_PHY_
RX command. The CMD_PHY_RX command is issued while
FW_STATE is busy (that is, transitioning between the PHY_OFF
and PHY_ON states) but the CMD_READY bit is high, indicating
that the command queue is empty. After the CMD_PHY_RX
command is issued, the CMD_READY bit transitions to a logic
low, indicating that the command queue is full. After the PHY_OFF
to PHY_ON transition is finished, the PHY_RX command is
processed immediately by the communications processor, and
the CMD_READY bit goes high, indicating that the command
queue is empty and another command can be issued.
0x12
0xB2
TRANSITION RADIO FROM
PHY_ON TO PHY_RX
= 0x00 (BUSY)
= 0x12 (PHY_ON)
0xA0
WAITING FOR COMMAND
0xB2
WAITING FOR COMMAND
= 0x13 (PHY_RX)
0xB3