PI7C7300DNAE Pericom Semiconductor, PI7C7300DNAE Datasheet - Page 76

IC PCI-PCI BRIDGE 3PORT 272-BGA

PI7C7300DNAE

Manufacturer Part Number
PI7C7300DNAE
Description
IC PCI-PCI BRIDGE 3PORT 272-BGA
Manufacturer
Pericom Semiconductor
Datasheet

Specifications of PI7C7300DNAE

Applications
*
Interface
*
Voltage - Supply
*
Package / Case
272-PBGA
Mounting Type
Surface Mount
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3 V to 3.6 V
Supply Current (max)
660 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PI7C7300DNAE
Manufacturer:
Pericom
Quantity:
135
Part Number:
PI7C7300DNAE
Manufacturer:
MAX
Quantity:
5 510
Part Number:
PI7C7300DNAE
Manufacturer:
Pericom
Quantity:
10 000
14.1.2
14.1.3
Pericom Semiconductor
DEVICE ID REGISTER – OFFSET 00h
Configuration Register 1
Configuration Register 2
COMMAND REGISTER – OFFSET 04h
Bit
31:16
Bit
31:16
Bit
0
1
2
3
4
5
Device ID
Device ID
Function
Function
Function
I/O Space Enable
Memory Space
Enable
Bus Master
Enable
Special Cycle
Enable
Memory Write
And Invalidate
Enable
VGA Palette
Snoop Enable
Type
R/O
Type
R/O
Type
R/W
R/W
R/W
R/O
R/O
R/W
Page 76 of 107
Description
Identifies this device as the PI7C7300D. Hardwired as 71E2h.
Description
Identifies this device as the PI7C7300D. Hardwired as 71E3h.
Description
Controls response to I/O access on the primary interface
0: ignore I/O transactions on the primary interface
1: enable response to I/O transactions on the primary interface
Reset to 0
Controls response to memory accesses on the primary interface
0: ignore memory transactions on the primary interface
1: enable response to memory transactions on the primary interface
Reset to 0
Controls ability to operate as a bus master on the primary interface
0: do not initiate memory or I/O transactions on the primary
interface and disable response to memory and I/O transactions on
secondary 1 interface
1: enables PI7C7300D to operate as a master on the primary
interfaces for memory and I/O transactions forwarded from the
secondary interface
Reset to 0
No special cycles defined.
Bit is defined as read only and returns 0 when read
Memory write and invalidate not supported.
Bit is implemented as read only and returns 0 when read (unless
forwarding a transaction for another master)
Controls response to VGA compatible palette accesses
0: ignore VGA palette accesses on the primary
1: enable positive decoding response to VGA palette writes on the
primary interface with I/O address bits AD[9:0] equal to 3C6h,
3C8h, and 3C9h (inclusive of ISA alias; AD[15:10] are not decoded
and may be any value)
3-PORT PCI-TO-PCI BRIDGE
November 2005 - Revision 1.01
PI7C7300D

Related parts for PI7C7300DNAE