AD9929BBCZ Analog Devices Inc, AD9929BBCZ Datasheet - Page 16

• Manufacturer Part Number: AD9929BBCZ
• Description: IC CCD SIGNAL PROCESSOR 64-BGA
• Manufacturer: Analog Devices Inc
• Type: CCD Signal Processor, 12-Bitr

Specifications of AD9929BBCZ

• Input Type: Logic
• Output Type: Logic
• Interface: 3-Wire Serial
• Mounting Type: Surface Mount
• Package / Case: 64-CSPBGA
• Analog Front End Type: CCD
• Analog Front End Category: Video
• Interface Type: Serial (3-Wire)
• Input Voltage Range: 0.5V
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (typ): 3V
• Operating Supply Voltage (max): 3.6V
• Resolution: 12b
• Number Of Adc's: 1
• Power Supply Type: Analog/Digital
• Operating Temp Range: -20C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: CSPBGA
• Number Of Channels: 1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

AD9929
Table 10. Mode_A Register Map (Address 0x15)
Register
Mode_Reg(0)
Mode_Reg(1)
Mode_Reg(2)
Mode_Reg(3)
Mode_Reg(4)
Mode_Reg(5)
Mode_Reg(6)
Mode_Reg(7)
Mode_Reg(8)
1
Register value must be a gray code number (see Gray Code Registers section).
Content
(31:24)
(23:0)
(31:21)
(20:9)
8
7
(6:0)
31
(30:28)
(27:25)
(24:22)
(21:19)
(18:16)
15
14
13
12
11
(10:3)
(2:0)
(31:27)
(26:19)
(18:11)
(10:9)
(8:7)
(6:5)
(4:3)
(2:0)
(31:29)
(28:26)
(25:23)
(22:12)
(11:1)
0
(31:19)
(18:6)
(5:0)
(31:25)
(24:12)
(11:0)
31
(30:18)
(17:5)
(4:0)
(31:24)
(23:11)
(10:9)
(8:0)
Bit
Width
24
1
1
1
1
1
1
1
3
3
3
3
1
13
8
11
12
7
1
3
3
3
3
3
8
5
8
8
2
2
2
2
3
11
11
13
13
6
7
13
12
1
13
13
5
8
2
9
Default
(Decimal)
NA
NA
262
1139
1
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
3
0
0
0
0
0
–
1138
1168
958
1138
988
1392
3
–
988
1078
1228
Register Name
Mode_A_Number_N
VDLEN
XVSGSEL1
XVSGSEL2
CLPEN0
CLPEN1
CLPEN2
CLPEN3
CLPEN4
VTPREP0
VTPREP2
VTPREP3
Unused
SECONDVPOS
Mode_A_addr
HDLASTLEN
XVSGACTLINE
SUBCKSEL
VTPSEQPTR0
VTPSEQPTR1
VTPSEQPTR2
VTPSEQPTR3
VTPSEQPTR4
SCP1
SCP2
SCP2
SCP3
SCP4
VTPSEL0
VTPSEL1
VTPSEL2
VTPSEL3
VTPREP1
SVREP0
SVREP3
XV1SPAT_TOG3
XV1SPAT_TOG4
XV2SPAT_TOG3
XV2SPAT_TOG3
XV2SPAT_TOG
XV3SPAT_TOG3
XV3SPAT_TOG3
XV3SPAT_TOG4
XV4SPAT_TOG3
XV4SPAT_TOG4
XV4SPAT_TOG4
VPATSECOND
Unused
Rev. A | Page 16 of 64
1
Register Description
Mode_A Address Is (Address 0x15)
Number N Register Writes (0x000000 = Write All Registers )
VD Counter Value
Number of Pixels in Last Line (Gray Code Number)
XVSG1 Sequence Selector (See
XVSG2 Sequence Selector (See
Vertical Transfer Sequence Region 0
Vertical Transfer Sequence Region 1
Vertical Transfer Sequence Region 2
Vertical Transfer Sequence Region 3
Vertical Transfer Sequence Region 4
CLPOB Output Control 1
CLPOB Output Control 2
CLPOB Output Control 3
CLPOB Output Control 4
CLPOB Output Control 5
Sequence Change Position 1
Sequence Change Position 3
Sequence Change Position 4
Vertical Pattern Selection 0
Vertical Pattern Selection 1
Vertical Pattern Selection 2
Vertical Pattern Selection 3
Number of Vertical Pulse Repetitions for Pattern 0
Number of Vertical Pulse Repetitions for Pattern 1
Number of Vertical Pulse Repetitions for Pattern 2
Number of Vertical Pulse Repetitions for Pattern 3
Vertical Sweep Repetition Number for CCD Region 0
Vertical Sweep Repetition Number for CCD Region 3
XV3SPAT Toggle Position 4
Second V Pattern Output Position
XVSG Active Line
Select one of two SUBCK patterns
Sequence Change Position 2
XV1SPAT Toggle Position 3
XV1SPAT Toggle Position 4
XV2SPAT Toggle Position 3
XV2SPAT Toggle Position 4
XV3SPAT Toggle Position 3
XV4SPAT Toggle Position 3
XV4SPAT Toggle Position 4
Selected Second V-Pattern Group for VSG Active Line
Table 35
Table 35
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