ST92T163R4T1 STMicroelectronics, ST92T163R4T1 Datasheet - Page 69
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ST92T163R4T1
Manufacturer Part Number
ST92T163R4T1
Description
Microcontrollers (MCU) OTP EPROM 20K USB/I2
Manufacturer
STMicroelectronics
Datasheet
1.ST92T163R4T1.pdf
(224 pages)
Specifications of ST92T163R4T1
Data Bus Width
8 bit, 16 bit
Program Memory Type
EPROM
Program Memory Size
20 KB
Data Ram Size
2 KB
Interface Type
I2C, SCI, USB
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
64
Number Of Timers
2
Operating Supply Voltage
4 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
TQFP-64
Minimum Operating Temperature
0 C
On-chip Adc
8 bit
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST92T163R4T1L
Manufacturer:
ST
Quantity:
444
Part Number:
ST92T163R4T1L
Manufacturer:
ST
Quantity:
20 000
WAKE-UP / INTERRUPT LINES MANAGEMENT UNIT (Cont’d)
WAKE-UP
(WUTRH)
R252 - Read/Write
Register Page: 57
Reset Value: 0000 0000 (00h)
Bit 7:0 = WUT[15:8]: Wake-Up Trigger Polarity
Bits
These bits are set and cleared by software.
0: The corresponding WUPx pending bit will be set
1: The corresponding WUPx pending bit will be set
WAKE-UP TRIGGER REGISTER LOW (WUTRL)
R253 - Read/Write
Register Page: 57
Reset Value: 0000 0000 (00h)
Bit 7:0 = WUT[7:0]: Wake-Up Trigger Polarity Bits
These bits are set and cleared by software.
0: The corresponding WUPx pending bit will be set
1: The corresponding WUPx pending bit will be set
WARNING
1. As the external wake-up lines are edge trig-
2. If either a rising or a falling edge on the external
WUT15 WUT14 WUT13 WUT12 WUT11 WUT10 WUT9
WUT7
on the falling edge of the input wake-up line.
on the rising edge of the input wake-up line.
on the falling edge of the input wake-up line.
on the rising edge of the input wake-up line.
gered, no glitches must be generated on these
lines.
wake-up lines occurs while writing the WUTRH
or WUTRL registers, the pending bit will not be
set.
7
7
WUT6
WUT5
TRIGGER
WUT4
WUT3
REGISTER
WUT2
WUT1
HIGH
WUT8
WUT0
0
0
WAKE-UP PENDING REGISTER HIGH
(WUPRH)
R254 - Read/Write
Register Page: 57
Reset Value: 0000 0000 (00h)
Bit 7:0 = WUP[15:8]: Wake-Up Pending Bits
These bits are set by hardware on occurrence of
the trigger event on the corresponding wake-up
line. They must be cleared by software. They can
be set by software to implement a software inter-
rupt.
0: No Wake-up Trigger event occurred
1: Wake-up Trigger event occured
WAKE-UP PENDING REGISTER LOW (WUPRL)
R255 - Read/Write
Register Page: 57
Reset Value: 0000 0000 (00h)
Bit 7:0 = WUP[7:0]: Wake-Up Pending Bits
These bits are set by hardware on occurrence of
the trigger event on the corresponding wake-up
line. They must be cleared by software. They can
be set by software to implement a software inter-
rupt.
0: No Wake-up Trigger event occurred
1: Wake-up Trigger event occured
Note: To avoid losing a trigger event while clear-
ing the pending bits, it is recommended to use
read-modify-write
BAND) to clear them.
WUP15 WUP14 WUP13 WUP12 WUP11 WUP10 WUP9
WUP7
7
7
WUP6
WUP5
WUP4
instructions
ST92163 - INTERRUPTS
WUP3
WUP2
(AND,
WUP1
BRES,
69/224
WUP8
WUP0
0
0