ST92T163R4T1 STMicroelectronics, ST92T163R4T1 Datasheet - Page 32

Microcontrollers (MCU) OTP EPROM 20K USB/I2

ST92T163R4T1

Manufacturer Part Number
ST92T163R4T1
Description
Microcontrollers (MCU) OTP EPROM 20K USB/I2
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST92T163R4T1

Data Bus Width
8 bit, 16 bit
Program Memory Type
EPROM
Program Memory Size
20 KB
Data Ram Size
2 KB
Interface Type
I2C, SCI, USB
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
64
Number Of Timers
2
Operating Supply Voltage
4 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
TQFP-64
Minimum Operating Temperature
0 C
On-chip Adc
8 bit
Lead Free Status / Rohs Status
No

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ST92163 - DEVICE ARCHITECTURE
SYSTEM REGISTERS (Cont’d)
If the bit is set, data is accessed using the Data
Pointers (DPRs registers), otherwise it is pointed
to by the Code Pointer (CSR register); therefore,
the user initialization routine must include a Sdm
instruction. Note that code is always pointed to by
the Code Pointer (CSR).
Note: In the ST9+, the DP flag is only for compat-
ibility with software developed for the first genera-
tion of ST9 devices. With the single memory ad-
dressing space, its use is now redundant. It must
be kept to 1 with a Sdm instruction at the beginning
of the program to ensure a normal use of the differ-
ent memory pointers.
2.3.3 Register Pointing Techniques
Two registers within the System register group,
are used as pointers to the working registers. Reg-
ister Pointer 0 (R232) may be used on its own as a
single pointer to a 16-register working space, or in
conjunction with Register Pointer 1 (R233), to
point to two separate 8-register spaces.
For the purpose of register pointing, the 16 register
groups of the register file are subdivided into 32 8-
register blocks. The values specified with the Set
Register Pointer instructions refer to the blocks to
be pointed to in twin 8-register mode, or to the low-
er 8-register block location in single 16-register
mode.
The Set Register Pointer instructions srp, srp0
and srp1 automatically inform the CPU whether
the Register File is to operate in single 16-register
mode or in twin 8-register mode. The srp instruc-
tion selects the single 16-register group mode and
32/224
specifies the location of the lower 8-register block,
while the srp0 and srp1 instructions automatical-
ly select the twin 8-register group mode and spec-
ify the locations of each 8-register block.
There is no limitation on the order or position of
these register groups, other than that they must
start on an 8-register boundary in twin 8-register
mode, or on a 16-register boundary in single 16-
register mode.
The block number should always be an even
number in single 16-register mode. The 16-regis-
ter group will always start at the block whose
number is the nearest even number equal to or
lower than the block number specified in the srp
instruction. Avoid using odd block numbers, since
this can be confusing if twin mode is subsequently
selected.
Thus:
srp #3 will be interpreted as srp #2 and will al-
low using R16 ..R31 as r0 .. r15.
In single 16-register mode, the working registers
are referred to as r0 to r15. In twin 8-register
mode, registers r0 to r7 are in the block pointed
to by RP0 (by means of the srp0 instruction),
while registers r8 to r15 are in the block pointed
to by RP1 (by means of the srp1 instruction).
Caution: Group D registers can only be accessed
as working registers using the Register Pointers,
or by means of the Stack Pointers. They cannot be
addressed explicitly in the form “Rxxx”.

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