ST92T163R4T1 STMicroelectronics, ST92T163R4T1 Datasheet - Page 176

• Manufacturer Part Number: ST92T163R4T1
• Description: Microcontrollers (MCU) OTP EPROM 20K USB/I2
• Manufacturer: STMicroelectronics

Specifications of ST92T163R4T1

• Data Bus Width: 8 bit, 16 bit
• Program Memory Type: EPROM
• Program Memory Size: 20 KB
• Data Ram Size: 2 KB
• Interface Type: I2C, SCI, USB
• Maximum Clock Frequency: 24 MHz
• Number Of Programmable I/os: 64
• Number Of Timers: 2
• Operating Supply Voltage: 4 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: TQFP-64
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit
• Lead Free Status / Rohs Status: No

ST92163 - I2C BUS INTERFACE
I
Figure 82. I
8.5.3 Functional Description
Refer to the I2CCR, I2CSR1 and I2CSR2 registers
in Section 8.5.7. for the bit definitions.
The I
between the ST9 microcontroller and the I
protocol. In addition to receiving and transmitting
data, the interface converts data from serial to
parallel format and vice versa using an interrupt or
polled handshake.
It operates in Multimaster/slave I
lection of the operating mode is made by software.
The I
data pin (SDAI) and a clock pin (SCLI) which must
be configured as open drain when the I
enabled by programming the I/O port bits and the
PE bit in the I2CCR register. In this case, the value
of the external pull-up resistance used depends on
the application.
When the I
ports revert to being standard I/ O port pins.
176/224
2
C INTERFACE (Cont’d)
SCL
SDA
2
2
C interface is connected to the I
C interface works as an I/O interface
2
2
C cell is disabled, the SDAI and SCLI
C Interface Block Diagram
SDAI
SCLI
DMA
CONTROL
2
CONTROL
CLOCK
C mode. The se-
DATA
CONTROL SIGNALS
2
C bus by a
2
C cell is
2
C bus
The I
Six of them are used for initialization:
– Own Address Registers I2COAR1, I2COAR2
– General Call Address Register I2CADR
– Clock Control Registers I2CCCR, I2CECCR
– Control register I2CCR
The following four registers are used during data
transmission/reception:
– Data Register I2CDR
– Control Register I2CCR
– Status Register 1 I2CSR1
– Status Register 2 I2CSR2
LOGIC AND INTERRUPT/ DMA REGISTERS
CLOCK CONTROL REGISTER
OWN ADDRES S REGISTE R 1
OWN ADDRESS REGISTER 2
GENERAL CALL ADDRESS
DATA SHIFT REGISTER
2
STATUS REGISTE R 1
STATUS REGISTE R 2
CONTROL REGISTE R
C interface has sixteen internal registers.
DATA BUS
DATA REGISTE R
COMPARA TOR
INTERRUPT
VR02119A