PIC18F46K80-I/P Microchip Technology Inc., PIC18F46K80-I/P Datasheet - Page 56

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PIC18F46K80-I/P

Manufacturer Part Number
PIC18F46K80-I/P
Description
40 PDIP .600IN TUBE, ECAN, 64KB FLASH, 4KB RAM, 16 MIPS, 12-BIT ADC, CTMU
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F46K80-I/P

A/d Inputs
11-Channel, 12-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
1K Bytes
Input Output
35
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin PDIP
Programmable Memory
64K Bytes
Ram Size
3.6K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
2-8-bit, 3-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part

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0
PIC18F66K80 FAMILY
REGISTER 3-1:
REGISTER 3-2:
DS39977C-page 56
bit 2
bit 1-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
U-0
2:
3:
4:
5:
6:
Reset state depends on the state of the IESO Configuration bit (CONFIG1H<7>).
Modifying these bits will cause an immediate clock frequency switch if the internal oscillator is providing
the device clocks.
Source selected by the INTSRC bit (OSCTUNE<7>).
Modifying these bits will cause an immediate clock source switch.
INTSRC = OSCTUNE<7> and MFIOSEL = OSCCON2<0>.
Lowest power option for an internal source.
When SOSC is selected to run from a digital clock input, rather than an external crystal, this bit has no
effect.
HFIOFS: HF-INTOSC Frequency Stable bit
1 = HF-INTOSC oscillator frequency is stable
0 = HF-INTOSC oscillator frequency is not stable
SCS<1:0>: System Clock Select bits
1x = Internal oscillator block (LF-INTOSC, MF-INTOSC or HF-INTOSC)
01 = SOSC oscillator
00 = Default primary oscillator (OSC1/OSC2 or HF-INTOSC with or without PLL. Defined by the
Unimplemented: Read as ‘0’
SOSCRUN: SOSC Run Status bit
1 = System clock comes from a secondary SOSC
0 = System clock comes from an oscillator other than SOSC
Unimplemented: Read as ‘0’
SOSCDRV: Secondary Oscillator Drive Control bit
1 = High-Power SOSC circuit is selected
0 = Low/High-Power select is done via the SOSCSEL<1:0> Configuration bits
SOSCGO: Oscillator Start Control bit
1 = Oscillator is running even if no other sources are requesting it.
0 = Oscillator is shut off if no other sources are requesting it (When the SOSC is selected to run from
Unimplemented: Read as ‘0’
MFIOFS: MF-INTOSC Frequency Stable bit
1 = MF-INTOSC is stable
0 = MF-INTOSC is not stable
MFIOSEL: MF-INTOSC Select bit
1 = MF-INTOSC is used in place of HF-INTOSC frequencies of 500 kHz, 250 kHz and 31.25 kHz
0 = MF-INTOSC is not used
SOSCRUN
a digital clock input, rather than an external crystal, this bit has no effect.)
R-0
FOSC<3:0> Configuration bits, CONFIG1H<3:0>.)
OSCCON: OSCILLATOR CONTROL REGISTER (CONTINUED)
OSCCON2: OSCILLATOR CONTROL REGISTER 2
W = Writable bit
‘1’ = Bit is set
U-0
SOSCDRV
R/W-0
Preliminary
(4)
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SOSCGO
R/W-0
(1)
U-0
 2011 Microchip Technology Inc.
x = Bit is unknown
MFIOFS
R-x
MFIOSEL
R/W-0
bit 0

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