PIC18F46K80-I/P Microchip Technology Inc., PIC18F46K80-I/P Datasheet - Page 470

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PIC18F46K80-I/P

Manufacturer Part Number
PIC18F46K80-I/P
Description
40 PDIP .600IN TUBE, ECAN, 64KB FLASH, 4KB RAM, 16 MIPS, 12-BIT ADC, CTMU
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F46K80-I/P

A/d Inputs
11-Channel, 12-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
1K Bytes
Input Output
35
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin PDIP
Programmable Memory
64K Bytes
Ram Size
3.6K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
2-8-bit, 3-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part

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0
PIC18F66K80 FAMILY
REGISTER 28-8:
DS39977C-page 470
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-0
Note 1:
R/C-1
CPD
For the memory size of the blocks, see
CPD: Data EEPROM Code Protection bit
1 = Data EEPROM is not code-protected
0 = Data EEPROM is code-protected
CPB: Boot Block Code Protection bit
1 = Boot block is not code-protected
0 = Boot block is code-protected
Unimplemented: Read as ‘ 0 ’
R/C-1
CPB
CONFIG5H: CONFIGURATION REGISTER 5 HIGH (BYTE ADDRESS 300009h)
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
U-0
(1)
U-0
Preliminary
Figure
(1)
28-6. The boot block size changes with BBSIZ0.
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
 2011 Microchip Technology Inc.
x = Bit is unknown
U-0
U-0
bit 0

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