PIC18F46K80-I/P Microchip Technology Inc., PIC18F46K80-I/P Datasheet - Page 425

• Manufacturer Part Number: PIC18F46K80-I/P
• Description: 40 PDIP .600IN TUBE, ECAN, 64KB FLASH, 4KB RAM, 16 MIPS, 12-BIT ADC, CTMU
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F46K80-I/P

• A/d Inputs: 11-Channel, 12-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 1K Bytes
• Input Output: 35
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 44-pin PDIP
• Programmable Memory: 64K Bytes
• Ram Size: 3.6K Bytes
• Speed: 64 MHz
• Temperature Range: –40 to 125 °C
• Timers: 2-8-bit, 3-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

27.2.3.2
This section describes the message acceptance filters
and masks for the CAN receive buffers.
REGISTER 27-37: RXFnSIDH: RECEIVE ACCEPTANCE FILTER ‘n’ STANDARD IDENTIFIER FILTER
REGISTER 27-38: RXFnSIDL: RECEIVE ACCEPTANCE FILTER ‘n’ STANDARD IDENTIFIER FILTER
 2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4
bit 3
bit 2
bit 1-0
Note 1:
R/W-x
SID10
R/W-x
SID2
2:
Registers, RXF6SIDH:RXF15SIDH, are available in Mode 1 and 2 only.
Registers, RXF6SIDL:RXF15SIDL, are available in Mode 1 and 2 only.
In Mode 0, this bit must be set/cleared as required, irrespective of corresponding mask register value.
Message Acceptance Filters
and Masks
SID<10:3>: Standard Identifier Filter bits (if EXIDEN = 0 )
Extended Identifier Filter bits, EID<28:21> (if EXIDEN = 1 ).
SID<2:0>: Standard Identifier Filter bits (if EXIDEN = 0 )
Extended Identifier Filter bits, EID<20:18> (if EXIDEN = 1 ).
Unimplemented: Read as ‘ 0 ’
EXIDEN: Extended Identifier Filter Enable bit
1 = Filter will only accept extended ID messages
0 = Filter will only accept standard ID messages
Unimplemented: Read as ‘ 0 ’
EID<17:16>: Extended Identifier Filter bits
R/W-x
R/W-x
SID9
SID1
REGISTERS, HIGH BYTE [0  n  15]
REGISTERS, LOW BYTE [0  n  15]
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
R/W-x
R/W-x
SID8
SID0
R/W-x
SID7
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
PIC18F66K80 FAMILY
EXIDEN
(2)
R/W-x
R/W-x
SID6
(1)
(1)
(2)
R/W-x
SID5
U-0
—
x = Bit is unknown
x = Bit is unknown
R/W-x
R/W-x
EID17
SID4
DS39977C-page 425
EID16
R/W-x
R/W-x
SID3
bit 0
bit 0