PIC18F46K80-I/P Microchip Technology Inc., PIC18F46K80-I/P Datasheet - Page 264
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PIC18F46K80-I/P
Manufacturer Part Number
PIC18F46K80-I/P
Description
40 PDIP .600IN TUBE, ECAN, 64KB FLASH, 4KB RAM, 16 MIPS, 12-BIT ADC, CTMU
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F46K80-IPT.pdf
(628 pages)
Specifications of PIC18F46K80-I/P
A/d Inputs
11-Channel, 12-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
1K Bytes
Input Output
35
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin PDIP
Programmable Memory
64K Bytes
Ram Size
3.6K Bytes
Speed
64 MHz
Temperature Range
–40 to 125 °C
Timers
2-8-bit, 3-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
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PIC18F66K80 FAMILY
19.2.3
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep the
CCPxIE bit (PIE4<x>) clear to avoid false interrupts
and should clear the flag bit, CCPxIF, following any
such change in operating mode.
19.2.4
There are four prescaler settings in Capture mode.
They are specified as part of the operating mode
selected by the mode select bits (CCPxM<3:0>).
Whenever the CCP module is turned off, or the CCP
module is not in Capture mode, the prescaler counter
is cleared. This means that any Reset will clear the
prescaler counter.
Switching from one capture prescaler to another may
generate an interrupt. Doing that also will not clear the
prescaler counter – meaning the first capture may be
from a non-zero prescaler.
Example 19-1
switching between capture prescalers. This example
also clears the prescaler counter and will not generate
the “false” interrupt.
EXAMPLE 19-1:
DS39977C-page 264
CLRF
MOVLW NEW_CAPT_PS ; Load WREG with the
MOVWF CCPxCON
CCPxCON
SOFTWARE INTERRUPT
CCP PRESCALER
shows the recommended method for
CHANGING BETWEEN
CAPTURE PRESCALERS
; Turn CCP module off
; new prescaler mode
; value and CCP ON
; Load CCPxCON with
; this value
Preliminary
19.2.5
For CCP2, only the CAN capture event occurs when a
message is received in any of the receive buffers.
When configured, the CAN module provides the trigger
to the CCP2 module to cause a capture event. This
feature is provided to “time-stamp” the received CAN
messages.
This feature is enabled by setting the CANCAP bit of
the CAN I/O Control register (CIOCON<4>). The mes-
sage receive signal from the CAN module then takes
the place of the events on RC2/CCP2.
If this feature is selected, then four different capture
options for CCP2M<3:0> are available:
• 0100 – Every time a CAN message is received
• 0101 – Every time a CAN message is received
• 0110 – Every 4th time a CAN message is
• 0111 – Capture mode, every 16th time a CAN
received
message is received
CAN MESSAGE TIME-STAMP
(CCP2 ONLY)
2011 Microchip Technology Inc.
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