PIC18F4431-I/P Microchip Technology Inc., PIC18F4431-I/P Datasheet - Page 84
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
PIC18F4431-I/P
Manufacturer Part Number
PIC18F4431-I/P
Description
Microcontroller; 16 KB Flash; 768 RAM; 256 EEPROM; 36 I/O; 40-Pin-PDIP
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F4431-IP.pdf
(396 pages)
Specifications of PIC18F4431-I/P
A/d Inputs
9-Channel, 10-Bit
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
36
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
16K Bytes
Ram Size
768 Bytes
Speed
40 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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- Download datasheet (8Mb)
PIC18F2331/2431/4331/4431
EXAMPLE 6-3:
DS39616B-page 82
READ_BLOCK
MODIFY_WORD
ERASE_BLOCK
WRITE_BUFFER_BACK
PROGRAM_LOOP
WRITE_WORD_TO_HREGS
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
TBLRD*+
MOVFW
MOVWF
DECFSZ COUNTER
GOTO
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
BCF
BSF
BSF
BSF
BCF
MOVLW
MOVWF
MOVLW
MOVWF
BSF
NOP
BSF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVFW
MOVWF
TBLWT+*
DECFSZ COUNTER
GOTO
WRITING TO FLASH PROGRAM MEMORY
D'64
COUNTER
BUFFER_ADDR_HIGH
FSR0H
BUFFER_ADDR_LOW
FSR0L
CODE_ADDR_UPPER
TBLPTRU
CODE_ADDR_HIGH
TBLPTRH
CODE_ADDR_LOW
TBLPTRL
TABLAT
POSTINC0
READ_BLOCK
DATA_ADDR_HIGH
FSR0H
DATA_ADDR_LOW
FSR0L
NEW_DATA_LOW
POSTINC0
NEW_DATA_HIGH
INDF0
CODE_ADDR_UPPER
TBLPTRU
CODE_ADDR_HIGH
TBLPTRH
CODE_ADDR_LOW
TBLPTRL
EECON1,CFGS
EECON1,EEPGD
EECON1,WREN
EECON1,FREE
INTCON,GIE
55h
EECON2
AAh
EECON2
EECON1,WR
INTCON,GIE
8
COUNTER_HI
BUFFER_ADDR_HIGH
FSR0H
BUFFER_ADDR_LOW
FSR0L
8
COUNTER
POSTINC0
TABLAT
WRITE_WORD_TO_HREGS
Preliminary
; number of bytes in erase block
; point to buffer
; Load TBLPTR with the base
; address of the memory block
; 6 LSB = 0
; read into TABLAT, and inc
; get data
; store data and increment FSR0
; done?
; repeat
; point to buffer
; update buffer word and increment FSR0
; update buffer word
; load TBLPTR with the base
; address of the memory block
; 6 LSB = 0
; point to PROG/EEPROM memory
; point to Flash program memory
; enable write to memory
; enable Row Erase operation
; disable interrupts
; Required sequence
; write 55H
; write AAH
; start erase (CPU stall)
; re-enable interrupts
; number of write buffer groups of 8 bytes
; point to buffer
; number of bytes in holding register
; get low byte of buffer data and increment FSR0
; present data to table latch
; short write
; to internal TBLWT holding register, increment
; TBLPTR
; loop until buffers are full
2003 Microchip Technology Inc.
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