PIC18F4431-I/P Microchip Technology Inc., PIC18F4431-I/P Datasheet - Page 252
PIC18F4431-I/P
Manufacturer Part Number
PIC18F4431-I/P
Description
Microcontroller; 16 KB Flash; 768 RAM; 256 EEPROM; 36 I/O; 40-Pin-PDIP
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F4431-IP.pdf
(396 pages)
Specifications of PIC18F4431-I/P
A/d Inputs
9-Channel, 10-Bit
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
36
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
16K Bytes
Ram Size
768 Bytes
Speed
40 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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PIC18F2331/2431/4331/4431
The A/D channels are grouped into four sets of 2 or 3
channels. For the PIC18F2X31 devices, AN0 and AN4
are in Group A, AN1 is in Group B, AN2 is in Group C
and AN3 is in Group D. For the PIC18F4X31 devices,
AN0, AN4 and AN8 are in Group A, AN1 and AN5 are
in Group B, AN2 and AN6 are in Group C and AN3 and
AN7 are in Group D. The selected channel in each
group is selected by configuring the A/D Channel
Select Register, ADCHS.
The analog voltage reference is software selectable to
either the device’s positive and negative analog supply
voltage (AV
RA3/AN3/V
CAP1/INDX, or some combination of supply and
external sources. Register ADCON1 controls the
voltage reference settings.
FIGURE 20-1:
DS39616B-page 250
AN3/V
AN2/V
Note 1:
AN5
AN7
AN8
AN6
REF
AN1
AN0
AN4
REF
(1)
(1)
(1)
(1)
+
-
REF
DD
AN5 through AN8 are available only on PIC18F4X31 devices.
+/CAP2/QEA
and AV
ACMOD, GxSEL<1:0>
ACMOD, GxSEL<1:0>
SS
A/D BLOCK DIAGRAM
Analog
Analog
Mux
Mux
), or the voltage level on the
and
V
V
REF
REF
+
-
RA2/AN2/V
AV
AV
SS
SS
S/H-1
+
S/H-2
-
ACMOD
ACONV
ACSCM
+
-
S/H
AV
S/H
REF
DD
Preliminary
AV
-/
SS
Seq.
Cntrl.
The A/D converter has a unique feature of being able
to operate while the device is in Sleep mode. To
operate in Sleep, the A/D conversion clock must be
derived from the A/D’s internal RC oscillator.
A device Reset forces all registers to their Reset state.
This forces the A/D module to be turned off and any
conversion in progress is aborted.
Each port pin associated with the A/D converter can
individually be configured as an analog input or digital
I/O using the ANSEL0 and ANSEL1 registers. The
ADRESH and ADRESL registers contain the value in
the
(ADCON1<1:0>). The result buffer is a 4-deep circular
buffer
(ADCON1<3>), and an overflow status bit, BOVFL
(ADCON1<2>).
VREFL
result
1
4
2
3
that
4x10-bit FIFO
10
VCFG<1:0>
ADC
buffer
has
VREFH
an
pointed
2003 Microchip Technology Inc.
ADRESH, ADRESL
empty
00
01
10
11
MUX
to
status
by
ADPNT<1:0>
bit,
ADPNT<1:0>
BEMT
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