PIC18F4431-I/P Microchip Technology Inc., PIC18F4431-I/P Datasheet - Page 185
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PIC18F4431-I/P
Manufacturer Part Number
PIC18F4431-I/P
Description
Microcontroller; 16 KB Flash; 768 RAM; 256 EEPROM; 36 I/O; 40-Pin-PDIP
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F4431-IP.pdf
(396 pages)
Specifications of PIC18F4431-I/P
A/d Inputs
9-Channel, 10-Bit
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
36
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
16K Bytes
Ram Size
768 Bytes
Speed
40 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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FIGURE 17-2:
FIGURE 17-3:
This module contains four duty-cycle generators,
numbered 0 through 3. The module has eight PWM
output pins, numbered 0 through 7. The eight PWM
outputs are grouped into output pairs of even and odd
numbered outputs. In complimentary modes, the even
PWM pins must always be the complement of the
corresponding odd PWM pin. For example, PWM0 will
be the complement of PWM1, PWM2 will be the
complement of PWM3, and so on. The dead time
2003 Microchip Technology Inc.
Fault A pin
Fault B pin
Fault A pin
Fault B pin
PWM Duty Cycle Register
Duty Cycle Comparator
Channel Override Values
PWM Duty Cycle Register
Fault Override Values
Channel Override Values
Fault Pin Assignment
Fault Pin Assignment
PWM MODULE BLOCK DIAGRAM, ONE OUTPUT PAIR, COMPLEMENTARY
MODE
PWM MODULE BLOCK DIAGRAM, ONE OUTPUT PAIR, INDEPENDENT MODE
Fault Override Values
Duty Cycle Comparator
Logic
Logic
PIC18F2331/2431/4331/4431
V
DD
Preliminary
Note:
V
V
DD
DD
Dead-Band
generator inserts an “off” period called “dead time”
between the going off of one pin to the going on of the
complementary pin of the paired pins. This is to prevent
damage to the power switching devices that will be
connected to the PWM output pins.
The time base for the PWM module is provided by its
own 12-bit timer, which also incorporates selectable
prescaler and postscaler options.
Generator
In the Complementary mode, the even channel cannot be
forced active by a fault or override event when the odd channel
is active. The even channel is always the complement of the
odd channel and is inactive, with dead time inserted, before
the odd channel is driven to its active state.
HPOL
LPOL
HPOL
LPOL
DS39616B-page 183
PWM0
PWM1
PWM1
PWM0
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